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EP0623958A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semi-conductor integrated circuit including protection means

Assignee: Siemens AG
•
Filing: 1993-05-04
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Granted: —
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Expires: 2013-05-04
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Abstract

Abstract The integrated semiconductor circuit contains voltage buses P1, P2 for supply voltages VSS, VCC, first circuit parts CKT-I for reception and processing of input signals IN, second circuit parts CKT-O for generating output signals OUT, terminals PI for lines LI carrying the input signals IN, terminals PO for lines LO carrying the output signals OUT, as well as a voltage-surge protection arrangement. The protection arrangement has, on each terminal PI, a first protection circuit PADIN and, on each terminal PO, a second protection circuit PADOUT. A particular first protection circuit PADIN is connected to the corresponding line LI. A particular second protection circuit PADOUT is connected via an additional line LO1 to the corresponding terminal PO. The protection circuits PADIN, PADOUT in each case contain a field-oxide transistor FOX, a field-controlled diode ZVT and a diffusion resistor Rdif. The field-oxide transistor FOX and the field-controlled diode ZVT are in each case arranged between the particular line LI or the particular additional line LO1, respectively, and the first voltage bus P1. The diffusion resistor Rdif is formed along a particular line LI or along the particular additional line LO1, respectively, actually between the terminals for the field-oxide transistor FOX and for the field-controlled diode ZVT. In the case of the field-oxide transistor FOX, a trough-shaped region S-well or D-well is formed, in mutual separation, in each case below the source and drain regions S, D. At least one of the voltage buses P1, P2 is, in the regions in which at least one of the protection circuits PADIN, PADOUT is next to it, underlaid by a protection structure VSS-well or VCC-well, respectively, formed in the shape of a trough in the substrate Sub. <IMAGE>

Inventors

  • 👤 Werner Dr.-Ing. Reczek
  • 👤 Hartmud Dipl.-Ing. Terletzki (Tu)

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 07:35
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/611

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

US4987465A Cited

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