EP0616422A1
Expired / Lapsed
EP
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Pulse width modulation circuit
Assignee: Toshiba Corp
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Filing: 1994-03-17
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Granted: —
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Expires: 2014-03-17
Abstract
Abstract To suppress electromagnetic radiation without exerting any harmful influence upon both S/N ratio and dynamic range, a pulse width modulation circuit includes: an integrating circuit (10) for integrating an input signal applied to an input terminal with respect to time; a comparing circuit (20) provided output side of the integrating circuit and having hysteresis characteristics; a feedback circuit (30) for feeding back the output of the comparing circuit to an input of the integrating circuit; and an amplitude modulation circuit (40) provided in a loop including the integrating circuit and the comparing circuit, for implementing amplitude modulation to modulate a frequency of the output of the comparing circuit. Further, the output of the comparing circuit can be fed-back to the integrating circuit via an amplitude modulation circuit. Alternatively, the amplitude of the output of the integrating circuit is first modulated by the amplitude modulation circuit, before applied to the comparing circuit. A dither signal is applied to the amplitude modulation circuit or, alternatively, a signal for maintaining frequency of the pulse modulated signal may be applied.
Inventors
- 👤 Hiroyuki Haga
- 👤 Satoshi Osuga
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 22:25
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/20; H03F3/21; H03F3/217
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
124 words
A pulse width modulation circuit comprising: an input terminal (1); an integrating circuit (10) for integrating an input signal applied to said input terminal with respect to time; a comparing circuit (20), provided at an output side of said integrating circuit, having first and second threshold values which compares the input signal thereof with the first and second threshold values; an output terminal (5) connected to an output of said comparing circuit; a feedback circuit (30) for feeding back the output of said comparing circuit to an input of said integrating circuit; and an amplitude modulation circuit (40) provided in a loop including said integrating circuit and said comparing circuit, for implementing amplitude modulation to modulate frequency of the output of said comparing circuit.
Claim 2
Dependent Claim
124 words
A pulse width modulation circuit comprising: an input terminal (1); an integrating circuit (10) for integrating an input signal applied to said input terminal with respect to time; a comparing circuit (20), provided at an output side of said integrating circuit, having first and second threshold values which compares the input signal thereof with the first and second threshold values; an output terminal (5) connected to an output of said comparing circuit; a feedback circuit (30) for feeding back the output of said comparing circuit to an input of said integrating circuit; and an amplitude modulation circuit (40) provided in a loop including said integrating circuit and said comparing circuit, for implementing amplitude modulation to modulate frequency of the output of said comparing circuit.
Claim 3
Dependent Claim
149 words
A pulse width modulation circuit comprising: an input terminal (1); an integrating circuit (10) for integrating an input signal applied to said input terminal with respect to time; a comparing circuit (20), connected to an output of said integrating circuit, having first and second threshold values which compares the output of the integrating circuit with the first and second threshold values; an output terminal (5) connected to an output of said comparing circuit; a first feedback circuit (30) for feeding back the output of said comparing circuit to an input of said integrating circuit; an amplitude modulation circuit (40) for implementing amplitude modulation of the output of said comparing circuit; and a second feedback circuit (40, 9) for feeding back the output of said comparing circuit to an input of said amplitude modulation circuit, and the output of said amplitude modulation circuit to the input of said integrating circuit.
Claim 4
Dependent Claim
149 words
A pulse width modulation circuit comprising: an input terminal (1); an integrating circuit (10) for integrating an input signal applied to said input terminal with respect to time; a comparing circuit (20), connected to an output of said integrating circuit, having first and second threshold values which compares the output of the integrating circuit with the first and second threshold values; an output terminal (5) connected to an output of said comparing circuit; a first feedback circuit (30) for feeding back the output of said comparing circuit to an input of said integrating circuit; an amplitude modulation circuit (40) for implementing amplitude modulation of the output of said comparing circuit; and a second feedback circuit (40, 9) for feeding back the output of said comparing circuit to an input of said amplitude modulation circuit, and the output of said amplitude modulation circuit to the input of said integrating circuit.
Claim 5
Dependent Claim
31 words
The pulse width modulation circuit as set forth in claim 2, wherein an amplitude-modulating dither signal is applied to said amplitude modulation circuit together with the output of said comparing circuit.
Claim 6
Dependent Claim
42 words
The pulse width modulation circuit as set forth in claim 2, wherein said amplitude modulation circuit (40) is a differential amplifier circuit composed of a pair of transistors (41, 42), the dither signal being supplied to common emitters of said two transistors.
Claim 7
Dependent Claim
32 words
The pulse width modulation circuit as set forth in claim 2, wherein said output terminal is composed of a first and second output terminals (5, 5A) for outputting signals having opposite polarities.
Claim 8
Dependent Claim
54 words
The pulse width modulation circuit as set forth in claim 5, further comprising: an inverter (3), connected to an output of the comparing circuit, for inverting the output of the comparing circuit; and a buffer (3A), connected to the output of comparing circuit, for maintaining the polarity of the output of the comparing circuit.
Claim 9
Dependent Claim
72 words
The pulse width modulation circuit as get forth in claim 6, wherein: the first output terminal (5) is connected to an inversion input terminal of an operational amplifier (11) which constitutes said integrating circuit, via the first feeding back circuit which includes a first feedback resistor (4); and the second output terminal (5A) is connected to a non-inversion input terminal of the operational amplifier (11) via a second feeding back resistor (4A).
Claim 10
Dependent Claim
179 words
The pulse width modulation circuit an set forth in claim 2, wherein said amplitude modulation circuit comprises: a first switch circuit (51) which inputs the output signal of the comparing circuit at a first input thereof, and which inputs a dither signal at a second input thereof, said first switch circuit outputting the output signal of the comparing circuit which is within a level of the dither signal; a second switch circuit (54) which inputs an inverted output signal of the comparing circuit at a first thereof and which inputs an inverted dither signal at a second input thereof, said second switch circuit outputting the inverted output signal of the comparing circuit which is within a level of the inverted dither signal; a first multiplier (55) for multiplying the output of said first switch circuit by the input signal; a second multiplier (56) for multiplying the output of said second switch circuit by the inverted input signal; and a circuit for superposing (57, 58) the outputs of said first and second multipliers upon the input of said integrating circuit.
Claim 11
Dependent Claim
135 words
The pulse width modulation circuit as set forth in claim 2, wherein said amplitude modulation circuit comprises: first and second differential amplifiers (64, 65, 68, 69) for comparing the output of said comparing circuit with respective predetermined reference voltages; a current mirror circuit (61, 62, 63) for flowing current through common emitters of said differential amplifiers according to a dither signal; an inversion amplifier (66, 67) for inverting an output of said second differential amplifier; a first multiplier (55) for multiplying an output of said first differential amplifier by the input signal; a second multiplier (56) for multiplying an output of said inversion amplifier by the input signal which has been inverted; and a circuit for superposing (57, 58) the outputs of said first and second differential amplifiers upon the input of said integrating circuit.
Claim 12
Dependent Claim
43 words
The pulse width modulation circuit as set forth in claim 2, wherein a power driver circuit (70) is connected between said comparing circuit and said output terminal, a low impedance load (81) being connected to said output terminal via a low-pass filter (80).
Claim 13
Dependent Claim
20 words
The pulse width modulation circuit as set forth in claim 10, wherein the low impedance load is a speaker (81).
Claim 14
Dependent Claim
35 words
The pulse width modulation circuit as set forth in claim 5, wherein a low impedance load is connected between the first and second output terminals via first and second inductances of a low-pass filter (80).
Claim 15
Dependent Claim
22 words
The pulse width modulation circuit as set forth in claim 10 or 11, wherein the low impedance load is a speaker (81).
Claim 16
Dependent Claim
41 words
The pulse width modulation circuit as set forth in claim 3, wherein said amplitude modulation circuit has a dither signal input terminal to which a correction signal for maintaining frequency of pulse width modulated signal at specific duty factor is supplied.
Claim 17
Dependent Claim
27 words
The pulse width modulation circuit as set forth in claim 13, wherein a circuit for generating the correction signal is connected to the dither signal input terminal.
Claim 18
Dependent Claim
85 words
The pulse width modulation circuit as set forth in claim 14, wherein said circuit for generating correction signal comprises: a peak detecting circuit (92) for detecting a peak value of the input signal; a plurality of comparators (93, 94, 95) for comparing an output of said peak detecting circuit with different reference voltages; a plurality of switching amplifiers (96, 97, 98) controlled according to the outputs of said comparators, respectively; and an adder circuit (99) for adding outputs of said switching amplifiers to each other.
Claim 19
Dependent Claim
108 words
A pulse width modulation circuit, comprising: an input terminal (1); an integrating circuit (10) for integrating an input signal applied to said input terminal with respect to time; an amplitude modulation circuit (40), connected to an output of the integrating circuit, for modulating a frequency of a signal output by the integrating circuit; a comparing circuit (20), connected to an output of the integrating circuit, for comparing the output of the amplitude modulation circuit with first and second values; an output terminal (5), connected to an output of the comparing circuit; and a feedback circuit (30), which connects the output terminal to an input of the integrating circuit.
Claim 20
Dependent Claim
108 words
A pulse width modulation circuit, comprising: an input terminal (1); an integrating circuit (10) for integrating an input signal applied to said input terminal with respect to time; an amplitude modulation circuit (40), connected to an output of the integrating circuit, for modulating a frequency of a signal output by the integrating circuit; a comparing circuit (20), connected to an output of the integrating circuit, for comparing the output of the amplitude modulation circuit with first and second values; an output terminal (5), connected to an output of the comparing circuit; and a feedback circuit (30), which connects the output terminal to an input of the integrating circuit.
Claim 21
Dependent Claim
28 words
The pulse width modulation circuit as set forth in claim 16, which further comprises a modulated wave generating circuit (110) for controlling operation of said amplitude modulation circuit.
Claim 22
Dependent Claim
71 words
The pulse width modulation circuit as set forth in claim 18, wherein said modulated wave generating circuit comprises: a peak detecting circuit (111) for detecting a peak value of the input signal; an adder (113) for adding an output of said peak detecting circuit to the dither signal; and said amplitude modulation circuit being a multiplier (45) for multiplying an output of said adder by an output of said integrating circuit.
References Cited (Backward Citations)
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