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EP0601410A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Bias control circuit for radio-frequency power amplifier

Assignee: Sony Corp
•
Filing: 1993-11-25
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Granted: —
•
Expires: 2013-11-25
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Abstract

Abstract A bias control circuit (20) for a radio-frequency power amplifier which performs linear power amplification of an intermittent radio-frequency signal. The control circuit comprises a bias voltage setting circuit for supplying a bias voltage of a predetermined value to a power amplifying element (Q14) during a time period in which substantially none of the radio-frequency signal is supposed to be supplied to the power amplifying element, and setting the idle current of the power amplifying element to a predetermined value; and a sample and hold circuit (23) for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supposed to be supplied to the power amplifying element. And the output voltage of the sample and hold circuit is supplied as a bias voltage to the power amplifying element during the subsequent time period of supply of the radio-frequency signal to the power amplifying element, whereby the idle current of the power amplifying element is stabilized despite any temperature fluctuation.

Inventors

  • 👤 Sachio C/O Sony Corporation Iida
  • 👤 Norio C/O Sony Corporation Shimo
  • 👤 Hideaki C/O Sony Corporation Sato

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 11:21
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0244; H03F1/30; H03F1/301; H03F2200/00; H03F2200/481; H03F2200/483

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 159 words
A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of a radio-frequency signal supplied thereto intermittently at a predetermined repetition cycle, said bias control circuit comprising: a bias voltage setting circuit for supplying a bias voltage of a predetermined value to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element, and setting the idle current of said power amplifying element to a predetermined value; and a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element; wherein the output voltage of said sample and hold circuit is supplied as a bias voltage to said power amplifying element during the subsequent time period in which said radio-frequency signal is supplied to said power amplifying element.
Claim 2
Dependent Claim 65 words
The bias control circuit according to claim 1, wherein said bias voltage setting circuit comprises: a temperature compensating diode; a transistor supplied with the bias voltage including the terminal voltage of said diode; and a circuit for feeding back the output current in said power amplifying element to said transistor; wherein the output voltage of said transistor is supplied to said sample and hold circuit.
Claim 3
Dependent Claim 52 words
The bias control circuit according to claim 1, wherein said sample and hold circuit comprises: an A/D converter for executing analog-to-digital conversion of the input voltage; a memory for holding the output data of said A/D converter; and a D/A converter for executing digital-to-analog conversion of the data held in said memory.
Claim 4
Dependent Claim 37 words
The bias control circuit according to claim 2, wherein the voltage from a power source is supplied to said power amplifying element during the time period of supply of said radio-frequency signal regardless of said feedback circuit.

References Cited (Backward Citations)

EP0156694A1 Cited
EP0369135A2 Cited
EP0401013A2 Cited
EP0482502A2 Cited
EP0481741A2 Cited
US5128629A Cited

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