EP0600596A2
Expired / Lapsed
EP
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Improved bipolar transistor
Assignee: National Semiconductor Corp
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Filing: 1993-10-19
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Granted: —
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Expires: 2013-10-19
Abstract
Abstract An improved, walled-emitter, bipolar transistor and a method for fabricating such a transistor is disclosed. The method includes the step of separately doping the edges of the active base that are adjacent to the isolation oxide in order to increase the doping level at the edges and thus counteract base narrowing that would otherwise be present.
Inventors
- 👤 Perumal Ratnam
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 04:57
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/40; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
128 words
A method for fabricating a walled-emitter bipolar transistor having an emitter and a collector of a first polarity and a base of a second polarity, wherein the method comprises the steps of: providing a semiconductor substrate having a region of the first polarity isolated by isolation oxide; and then doping the substrate with a dopant of the second polarity to form a base that extends to the isolation oxide; doping the substrate with a dopant of the first polarity to form an emitter that extends to the isolation oxide; and further doping the semiconductor substrate where the emitter extends to the isolation oxide with a dopant of the second polarity to increase the level of dopant of the second polarity in the base adjacent to the isolation oxide.
Claim 2
Dependent Claim
33 words
A method as recited in claim 1 wherein the transistor is an NPN transistor, and wherein the polarity of the emitter and collector is negative and the polarity of the base is positive.
Claim 3
Dependent Claim
42 words
A method as recited in claim 2 wherein the step of further doping the semiconductor substrate where the emitter extends to the isolation oxide is performed by ion implanting a dopant at an energy within the range of 30 to 60 KV.
Claim 4
Dependent Claim
32 words
A method as recited in claim 1 wherein the transistor is a PNP transistor, wherein the polarity of the emitter and collector is positive and the polarity of the base is negative.
Claim 5
Dependent Claim
20 words
A method as recited in claim 1 wherein each doping step includes the steps of ion implanting followed by annealing.
Claim 6
Independent Claim
157 words
A method for fabricating a walled-emitter bipolar transistor having an emitter region that extends to an edge of an isolation oxide region, wherein the method comprises the steps of: forming an isolation oxide in a semiconductor substrate to isolate a region of a first polarity; depositing a polysilicon layer on the substrate; doping a portion of the substrate with a dopant of a second polarity to form a base region of the second polarity; ion-implanting a portion of the substrate and polysilicon with a dopant of the first polarity where an emitter region of the substrate is to be formed, wherein the emitter region when formed extends to the isolation oxide; ion-implanting a portion of the substrate and polysilicon with a dopant of the second polarity where the emitter region extends to the isolation oxide; and annealing the substrate to diffuse the ion-implanted dopant of the second polarity into the base region adjacent to the isolation oxide.
Claim 7
Dependent Claim
61 words
A method as recited in claim 6 wherein the step of ion-implanting a portion of the substrate and polysilicon with a dopant of the second polarity where the emitter extends to the isolation oxide is performed simultaneously with a step of doping the substrate and polysilicon with a dopant of the second polarity to form a base connection in the polysilicon.
Claim 8
Dependent Claim
61 words
A method as recited in claim 6 wherein the step of ion-implanting a portion of the substrate and polysilicon with a dopant of the second polarity where the emitter extends to the isolation oxide includes a step of masking the polysilicon over the emitter region to expose only that portion of the emitter region that is adjacent to the isolation oxide.
Claim 9
Dependent Claim
31 words
A method as recited in claim 8 wherein the step of masking the polysilicon over the emitter region exposes about 0.2 microns of the emitter region adjacent to the isolation oxide.
Claim 10
Dependent Claim
32 words
A method as recited in claim 6 wherein the transistor is an NPN transistor, wherein the polarity of the emitter and collector is negative and the polarity of the base is positive.
Claim 11
Dependent Claim
52 words
A method as recited in claim 10 wherein the step of ion-implanting a portion of the substrate and polysilicon with a dopant of the second polarity where the emitter extends to the isolation oxide is performed by ion implanting a dopant at an energy within the range of 20 to 100 KV.
Claim 12
Dependent Claim
32 words
A method as recited in claim 6 wherein the transistor is a PNP transistor, wherein the polarity of the emitter and collector is positive and the polarity of the base is negative.
Claim 13
Dependent Claim
128 words
A walled-emitter bipolar transistor fabricated by a process comprising the steps of: forming an isolation oxide in a semiconductor substrate to isolate a region of a first polarity; depositing a polysilicon layer on the substrate; doping a portion of the substrate with a dopant of a second polarity to form a base region of the second polarity; doping a portion of the substrate and polysilicon with a dopant of the first polarity to form an emitter region of the first polarity extending to the isolation oxide; and further doping the substrate and polysilicon with a dopant of the second polarity where the emitter region extends to the isolation oxide to increase the level of dopant of the second polarity in the base region adjacent to the isolation oxide.
Claim 14
Dependent Claim
60 words
A transistor as recited in claim 13 wherein the step of further doping the substrate and polysilicon with a dopant of the second polarity where the emitter region extends to the isolation oxide is performed simultaneously with a step of doping the substrate and polysilicon with a dopant of the second polarity to form a base connection in the polysilicon.
Claim 15
Dependent Claim
26 words
A walled-emitter, bipolar transistor in which the edges of the active base that are adjacent to the isolation oxide are higher doped to counteract base narrowing.
References Cited (Backward Citations)
No citation records indexed.
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