← Back to Patent Explorer
EP0597603A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Trench isolation planarization using a hard mask

Assignee: Digital Equipment Corp
•
Filing: 1993-10-25
•
Granted: —
•
Expires: 2013-10-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An improved process for planarizing an isolation trench in the fabrication of a semiconductor chip involves replacing the photoresist material used for planarization with a hard mask film. The hard mask material must be able to gap fill ("planarize") narrow trenches which do not receive a planarization block mask (or "filler mask") to protect them during the subsequent hard mask film etch. The hard mask film is typically conformal over large features and thus will not be susceptible to pattern density effects. Using the hard mask material, all active areas/trenches appear the same after planarization, independent of pattern density. Further, the hard mask material may subsequently be polished so that there are no peaks or spikes and no depressions.

Inventors

  • 👤 Gregory Joseph Grula
  • 👤 Ching-Tai Sherman Wang

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-02 06:21
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0143; H10P; H10P95/00; H10P95/06; H10P95/062; H10P95/064; H10W10/10; H10W10/17

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 133 words
For use in the fabrication of a semiconductor chip including an isolation trench having a top wall edge and a bottom and being adjacent to two sides having top surfaces thereon, a process of planarizing the isolation trench comprising the steps of: depositing a layer of dielectric material over and into the trench so as to fill the trench about to the top wall edge; depositing a layer of hard film over the layer of dielectric material to cover the dielectric material and the top surfaces of the sides; and etching back the layer of hard film and the layer of dielectric material until the hard film and the dielectric material are substantially removed from the top surfaces of the sides and until a small pocket of hard film remains over the trench.
Claim 2
Dependent Claim 133 words
For use in the fabrication of a semiconductor chip including an isolation trench having a top wall edge and a bottom and being adjacent to two sides having top surfaces thereon, a process of planarizing the isolation trench comprising the steps of: depositing a layer of dielectric material over and into the trench so as to fill the trench about to the top wall edge; depositing a layer of hard film over the layer of dielectric material to cover the dielectric material and the top surfaces of the sides; and etching back the layer of hard film and the layer of dielectric material until the hard film and the dielectric material are substantially removed from the top surfaces of the sides and until a small pocket of hard film remains over the trench.
Claim 3
Dependent Claim 51 words
A process of planarizing an isolation trench, according to claim 1, further including the step of polishing the small pocket of hard film and the dielectric material until any peak adjacent the hard film is considerably removed, wherein the step of polishing includes the step of applying a chemical mechanical polish.
Claim 4
Dependent Claim 58 words
A process of planarizing an isolation trench, according to claim 1, wherein the step of etching back the layer of hard film and the layer of dielectric material includes etching back the layer of hard film using a reactive ion hard-film etch, and includes etching back the layer of dielectric material using a reactive ion oxide- film etch.
Claim 5
Dependent Claim 81 words
A process of planarizing an isolation trench, according to claim 1, wherein the step of etching back the layer of hard film and the layer of dielectric material includes first etching back the layer of hard film using a reactive ion hard-film etch and then etching back the layer of dielectric material using a reactive ion oxide- film etch, and further includes the steps of stripping off excess material using a wet chemical and polishing the small pocket of hard film.
Claim 6
Dependent Claim 42 words
A process of planarizing an isolation trench, according to claim 1, wherein the step of etching back the layer of hard film and the layer of dielectric includes forming the small pocket of hard film to prevent a depression area from forming.
Claim 7
Dependent Claim 68 words
A process of planarizing an isolation trench, according to claim 1, wherein the step of etching back the layer of hard film and the layer of dielectric material continues until a thin layer of dielectric covers the top surfaces of the sides, wherein the step of etching back the layer of hard film and the layer of dielectric continues until the thin layer is about 1000 Angstroms thin.
Claim 8
Dependent Claim 151 words
For use in the fabrication of a semiconductor chip including an isolation trench having a top wall edge and a bottom and being adjacent to two sides having top surfaces thereon, a process of planarizing the isolation trench comprising the steps of: depositing a layer of dielectric material over and into the trench; depositing a layer of hard film over the layer of dielectric material to cover the dielectric material and the top surfaces of the sides; etching back the layer of hard film and the layer of dielectric material until the hard film and the dielectric material are substantially removed from the top surfaces of the sides and until a small pocket of hard film remains over the trench and adjacent a peak of dielectric material, such that there is no depression formed adjacent the peak; and polishing the small pocket of hard film until the peak is considerably removed.
Claim 9
Dependent Claim 151 words
For use in the fabrication of a semiconductor chip including an isolation trench having a top wall edge and a bottom and being adjacent to two sides having top surfaces thereon, a process of planarizing the isolation trench comprising the steps of: depositing a layer of dielectric material over and into the trench; depositing a layer of hard film over the layer of dielectric material to cover the dielectric material and the top surfaces of the sides; etching back the layer of hard film and the layer of dielectric material until the hard film and the dielectric material are substantially removed from the top surfaces of the sides and until a small pocket of hard film remains over the trench and adjacent a peak of dielectric material, such that there is no depression formed adjacent the peak; and polishing the small pocket of hard film until the peak is considerably removed.
Claim 10
Dependent Claim 70 words
A process of planarizing an isolation trench, according to claim 7, wherein the step of polishing includes the step of applying a chemical mechanical polish, wherein the step of etching back the layer of hard film and the layer of dielectric material continues until a thin layer of dielectric covers the top surfaces of the sides, further including removing the thin layer of dielectric, by applying a chemical mechanical polish.
Claim 11
Dependent Claim 75 words
A process of planarizing an isolation trench, according to claim 7, wherein the isolation trench is a wide trench and the process further includes the step of depositing a filler over the layer of hard film and above the trench before the step of etching back the layer of hard film and the layer of dielectric material, wherein the step of depositing a filler includes the step of reflowing the filler using a heating process.
Claim 12
Dependent Claim 148 words
For use in the fabrication of a semiconductor chip including an isolation trench having a top wall edge and a bottom and being adjacent to two sides having top surfaces thereon, a process of planarizing the isolation trench comprising the steps of: depositing a layer of dielectric material over and into the trench; depositing a layer of hard film over the layer of dielectric material to cover the dielectric material and the top surfaces of the sides; etching back the layer of hard film and the layer of dielectric material until the hard film is removed from the top surfaces of the sides and until the dielectric material is removed from the top surfaces except for a thin layer of about 1000 Angstroms; and applying chemical mechanical polish until substantially all the dielectric material is removed from the top surfaces and substantially all the hard film is removed.
Claim 13
Dependent Claim 148 words
For use in the fabrication of a semiconductor chip including an isolation trench having a top wall edge and a bottom and being adjacent to two sides having top surfaces thereon, a process of planarizing the isolation trench comprising the steps of: depositing a layer of dielectric material over and into the trench; depositing a layer of hard film over the layer of dielectric material to cover the dielectric material and the top surfaces of the sides; etching back the layer of hard film and the layer of dielectric material until the hard film is removed from the top surfaces of the sides and until the dielectric material is removed from the top surfaces except for a thin layer of about 1000 Angstroms; and applying chemical mechanical polish until substantially all the dielectric material is removed from the top surfaces and substantially all the hard film is removed.
Claim 14
Dependent Claim 13 words
A trench filling arrangement manufactured in accordance with the process of claim 10.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag