EP0594894A1
Expired / Lapsed
EP
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DC offset correction for direct-conversion TDMA receiver
Assignee: Alcatel Lucent SAS
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Filing: 1992-10-28
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Granted: —
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Expires: 2012-10-28
Abstract
Abstract The direct conversion receiver is designed for demodulating signals in a TDMA system, in which the carrier frequency may vary from time slot to time slot. The received RF signal is demodulated by mixing with a local oscillator (LO) in a quadrature mixer (MIX). Due to carrier leakage, and imperfections in the mixers (CO1,CO2), the demodulated signal may have a DC offset, which must then be compensated by baseband processing (OCC). Because of the varying carrier frequency, and of the varying gain of the front end amplifier (LNA), the amount of DC offset will vary from time slot to time slot. In order to account for this, a correction loop is provided with a memory (MEM), for storing correction parameters for each carrier frequency and gain setting. This correction is updated slowly over many time slots, so that the error variance will be small. In order to correct offsets before this slow loop has converged correctly, a wide bandwidth loop is also provided, functioning within individual time slots.
Inventors
- 👤 Joannes Mathilda Josephus Sevenhans
- 👤 Daniel Sallaerts
- 👤 Arnoul Octaaf Gabriel Vanwelsenaers
- 👤 Jacques Wenin
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 16:20
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/06; H04B1/16; H04B1/30; H03; H03D; H03D3/00; H03D3/007; H03D3/008; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/233
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
208 words
Offset correction circuit (OCC) for removing offset from an input signal being input thereto in assigned time slots, characterized in that said offset depends upon a variable parameter (FC, GM) whose value is characterized by one of a plurality of possible variable parameter values, one of which is valid in each of said assigned time slots, and that said offset correction circuit (OCC) includes a servo control loop which includes: - storage means (MEM) storing a variable parameter offset correction value for each of said plurality of possible variable parameter values; - a comparator circuit (SB, LP2, A2) to inputs of which said input signal and one of said variable parameter offset correction values are applied and which provides a difference signal at its output; - a signal averaging circuit (ADC, AV) wherein said difference signal is averaged over each of said time slots, thereby providing an instant average value; - a subtracter circuit (SD) wherein said instant average value is subtracted from a reference average value of said input signal (SKN), thereby providing a resulting control value; and - a calculating means (DIGF1) which regularly combines said resulting control value with said one variable parameter offset correction value, and stores the result in said storage means (MEM).
Claim 2
Dependent Claim
89 words
Offset correction circuit (OCC) according to claim 1, characterized in that it is applied in a direct conversion receiver (DCR) including a demodulator circuit (MIX, LO) to an input of which a carrier modulated by an analog modulating signal in said assigned time slots is applied and which provides at its output a demodulated analog signal constituting said input signal, that said offset correction circuit (OCC) is included in a baseband circuit (LP1, A1, OCC, LP1', A1', OCC', DSP) which is DC coupled to said demodulator circuit (MIX, LO).
Claim 3
Dependent Claim
22 words
Offset correction circuit (OCC) according to claim 2, characterized in that said carrier has a carrier frequency (FC) constituting said variable parameter.
Claim 4
Dependent Claim
32 words
Offset correction circuit (OCC) according to claim 2, characterized in that said direct conversion receiver (DCR) includes at least one amplifier stage (LNA) having a gain mode (GM) constituting said variable parameter.
Claim 5
Dependent Claim
27 words
Offset correction circuit (OCC) according to claims 3 or 4, characterized in that said demodulator circuit (MIX, LO) includes a local oscillator (LO) and a mixer (MIX).
Claim 6
Dependent Claim
84 words
Offset correction circuit (OCC) according to claim 1, characterized in that it includes an additional correction circuit (COMP, DAC2) for determining within each of said time slots a single offset correction value which is independent from said variable parameter (FC, GM), and which is applied to a second input of said comparator circuit (SB, LP2, A2) so that said difference signal is proportional to the difference between said input signal and both said variable parameter offset correction value and said single offset correction value.
Claim 7
Dependent Claim
97 words
Offset correction circuit (OCC) according to claims 6 and 2, characterized in that said assigned time slots each include a leading part (LE) within which said input signal contains no information to be detected, that said demodulator circuit (MIX, LO) is preceded by a switching means (LNA) for disconnecting said analog modulated signal carrier from said demodulator circuit (MIX, LO) during said leading part (LE), and that within said leading part (LE) said single offset correction value is determined in said additional correction circuit (COMP, DAC2) so that the value of said difference signal is substantially zero.
Claim 8
Dependent Claim
65 words
Offset correction circuit (OCC) according to claim 7, characterized in that said additional correction circuit (COMP, DAC2) includes a comparator (COMP) comparing said difference signal with zero and thereby acting as a one-bit analog-to-digital convertor, cascaded with a successive approximative digital to analog convertor (DAC2) determining in successive steps said single offset correction value so that the value of said difference signal is substantially zero.
Claim 9
Dependent Claim
35 words
Offset correction circuit (OCC) according to claim 1, characterized in that upon starting up said offset correction circuit (OCC) said storage means (MEM) is initialized with estimated values of said variable parameter offset correction values.
Claim 10
Dependent Claim
37 words
Offset correction circuit (OCC) according to claim 1, characterized in that it includes a forward correction circuit (DIGF2) in which offset remaining on said difference signal is removed by correcting it with a forward offset correction value.
Claim 11
Dependent Claim
65 words
Offset correction circuit (OCC) according to claim 11, characterized in that said forward offset correction value is constituted by said variable parameter offset correction value, and that said forward correction circuit (DIGF2) includes a digital filter (DIGF2) to inputs of which said difference signal and said resulting control value are applied and an output of which provides an offset corrected version of said input signal.
References Cited (Backward Citations)
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