EP0592064A2
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EP
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Field effect transistor and method of production
Assignee: Mitsubishi Electric Corp
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Filing: 1993-04-06
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Granted: —
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Expires: 2013-04-06
Abstract
Abstract A method of producing a field effect transistor includes depositing a first insulating film (5) and a refractory metal film (6) on a semiconductor epitaxial substrate, forming a first aperture (5a) penetrating the first insulating film (5) and the refractory metal film (6), which aperture provides a gate electrode production region, forming a second insulating film (8) on the refractory metal film (6), etching the second insulating film (8) in a direction perpendicular to the surface of the substrate leaving portions on opposite side walls of the first aperture (5a) to form a second aperture (8a), which second aperture provides a gate length, depositing a gate metal (13) on the whole surface of the substrate, and patterning the gate metal layer, the first insulating film, and the refractory metal film in a prescribed width to form a T-shaped gate structure (15). During etching the second insulating film (8), since the refractory metal film (6) serves as an etching stopper layer, the first insulating film (5) is not etched and its thickness remains as it is deposited. Therefore, the space between the over-hanging portion (15b) of the T-shaped gate electrode (15) and the source electrode (13a) increases with a reduction in the gate-to-source capacitance.
Inventors
- 👤 Tomoki c/o Mitsubishi Denk K.K. Oku
- 👤 Masayuki c/o Mitsubishi Denk K.K. Sakai
- 👤 Yasutaka c/o Mitsubishi Denk K.K. Kohno
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 09:57
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/015; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125; H10D64/20; H10D64/27; H10D64/311; H10D64/411; Y; Y10; Y10S; Y10S148/00; Y10S148/10; Y10S148/139; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/951
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
275 words
A method of producing a field effect transistor in which a T-shaped gate electrode and source and drain electrodes are self-alignedly produced on a semiconductor epitaxial substrate, comprising: depositing a first insulating film (5) and a metal thin film (6) on said semiconductor epitaxial substrate; forming a first resist pattern (7) having an aperture pattern of prescribed width on said metal thin film (6); etching said metal thin film (6) and said first insulating film (5) using said first resist pattern (7) as a mask to form a first aperture (5a); removing said first resist pattern (7), and depositing a second insulating film (8) having a prescribed thickness on said metal thin film (6) and said semiconductor epitaxial substrate exposed in said first aperture (5a); etching said second insulating film (8) in a direction perpendicular to the surface of said semiconductor epitaxial substrate, leaving portions on opposite side walls of said first aperture (5a) to produce a second aperture (8a) in said first aperture (5a); depositing a gate electrode metal (9) on the whole surface of said semiconductor epitaxial substrate, and patterning said gate metal layer (9), said metal thin film (6), and said first insulating film (5) in a prescribed width to form a T-shaped gate structure; forming a second resist pattern on said semiconductor epitaxial substrate, said second resist pattern having apertures opposite regions on said substrate where source and drain electrodes are to be formed; and depositing an ohmic electrode metal (13) on the whole surface of said substrate, and removing said second resist pattern with overlying portions of said ohmic electrode metal (13) by lift-off, producing source and drain electrodes (13a,13b).
Claim 2
Independent Claim
275 words
A method of producing a field effect transistor in which a T-shaped gate electrode and source and drain electrodes are self-alignedly produced on a semiconductor epitaxial substrate, comprising: depositing a first insulating film (5) and a metal thin film (6) on said semiconductor epitaxial substrate; forming a first resist pattern (7) having an aperture pattern of prescribed width on said metal thin film (6); etching said metal thin film (6) and said first insulating film (5) using said first resist pattern (7) as a mask to form a first aperture (5a); removing said first resist pattern (7), and depositing a second insulating film (8) having a prescribed thickness on said metal thin film (6) and said semiconductor epitaxial substrate exposed in said first aperture (5a); etching said second insulating film (8) in a direction perpendicular to the surface of said semiconductor epitaxial substrate, leaving portions on opposite side walls of said first aperture (5a) to produce a second aperture (8a) in said first aperture (5a); depositing a gate electrode metal (9) on the whole surface of said semiconductor epitaxial substrate, and patterning said gate metal layer (9), said metal thin film (6), and said first insulating film (5) in a prescribed width to form a T-shaped gate structure; forming a second resist pattern on said semiconductor epitaxial substrate, said second resist pattern having apertures opposite regions on said substrate where source and drain electrodes are to be formed; and depositing an ohmic electrode metal (13) on the whole surface of said substrate, and removing said second resist pattern with overlying portions of said ohmic electrode metal (13) by lift-off, producing source and drain electrodes (13a,13b).
Claim 3
Dependent Claim
72 words
The method of claim 1 including completely removing said first and second insulating films (5,8) after the formation of said T-shaped gate structure, depositing a third insulating film (12) on the whole surface of said semiconductor epitaxial substrate and said T-shaped gate structure, and forming said second resist pattern on said third insulating film (12), and removing portions of said third insulating film (12) using said second resist pattern as a mask.
Claim 4
Dependent Claim
57 words
The method claim 1 including producing said gate electrode metal layer by depositing a first metal film (14) on the whole surface of said semiconductor epitaxial substrate and then forming a second metal film (10) on said first metal film (14) by pulse plating or electroless plating using said first metal film (14) as a feeding electrode.
Claim 5
Independent Claim
339 words
A method of producing a field effect transistor in which a T-shaped gate electrode and source and drain electrodes are self-alignedly produced on a semiconductor epitaxial substrate, comprising: depositing a first insulating film (5) and a metal thin film (6) on said semiconductor epitaxial substrate; forming a first resist pattern (7) having an aperture pattern of prescribed width on said metal thin film (6); etching said metal thin film (6) and said first insulating film (5) using said first resist pattern (7) as a mask to form a first aperture (5a); removing said first resist pattern (7), and depositing a second insulating film (8) having a prescribed thickness on said metal thin film (6) and said semiconductor epitaxial substrate exposed in said first aperture (5a); etching said second insulating film (8) in a direction perpendicular to the surface of said semiconductor epitaxial substrate, leaving portions on the opposite side walls of said first aperture (5a) to produce a second aperture (8a) in said first aperture (5a); depositing a first gate metal (14) on the whole surface of said substrate, and forming a second resist pattern (16) having an aperture pattern of prescribed width on said first gate metal layer (14); forming a second gate metal layer (10) on said first metal layer (14) by pulse plating or electroless plating using said first metal layer (14) as a feeding electrode; removing said second resist pattern (16), and patterning said first insulating film (5), said metal thin film (6), and said first metal layer (14) in a prescribed width using said second metal layer (10) as a mask to produce a T-shaped gate structure; forming a third resist pattern on said semiconductor epitaxial substrate, said third resist pattern having apertures opposite regions on said substrate where source and drain electrodes are to be formed; and depositing an ohmic electrode metal (13) on the whole surface of said substrate, and removing said third resist pattern with overlying portions of said ohmic electrode metal (13) by lift-off, producing source and drain electrodes (13a,13b).
Claim 6
Independent Claim
339 words
A method of producing a field effect transistor in which a T-shaped gate electrode and source and drain electrodes are self-alignedly produced on a semiconductor epitaxial substrate, comprising: depositing a first insulating film (5) and a metal thin film (6) on said semiconductor epitaxial substrate; forming a first resist pattern (7) having an aperture pattern of prescribed width on said metal thin film (6); etching said metal thin film (6) and said first insulating film (5) using said first resist pattern (7) as a mask to form a first aperture (5a); removing said first resist pattern (7), and depositing a second insulating film (8) having a prescribed thickness on said metal thin film (6) and said semiconductor epitaxial substrate exposed in said first aperture (5a); etching said second insulating film (8) in a direction perpendicular to the surface of said semiconductor epitaxial substrate, leaving portions on the opposite side walls of said first aperture (5a) to produce a second aperture (8a) in said first aperture (5a); depositing a first gate metal (14) on the whole surface of said substrate, and forming a second resist pattern (16) having an aperture pattern of prescribed width on said first gate metal layer (14); forming a second gate metal layer (10) on said first metal layer (14) by pulse plating or electroless plating using said first metal layer (14) as a feeding electrode; removing said second resist pattern (16), and patterning said first insulating film (5), said metal thin film (6), and said first metal layer (14) in a prescribed width using said second metal layer (10) as a mask to produce a T-shaped gate structure; forming a third resist pattern on said semiconductor epitaxial substrate, said third resist pattern having apertures opposite regions on said substrate where source and drain electrodes are to be formed; and depositing an ohmic electrode metal (13) on the whole surface of said substrate, and removing said third resist pattern with overlying portions of said ohmic electrode metal (13) by lift-off, producing source and drain electrodes (13a,13b).
Claim 7
Dependent Claim
71 words
The method of claim 4 including completely removing said first and second insulating films (5,8) after the formation of said T-shaped gate structure, depositing a third insulating film (12) on the whole surface of said semiconductor epitaxial substrate and said T-shaped gate structure, forming said third resist pattern on said third insulating film (12), and removing portions of said third insulating film (12) using said third resist pattern as a mask.
Claim 8
Dependent Claim
72 words
A field effect transistor comprising: a semiconductor epitaxial substrate; a T-shaped gate electrode (15) and source and drain electrodes (13a,13b) disposed on said substrate; and said T-shaped gate electrode (15) comprising a lower electrode (14) having a gate length of 0.25 micron or less and an upper electrode (10) which is formed on said lower electrode (14) by pulse plating or electroless plating using said lower electrode (14) as a feeding electrode.
Claim 9
Dependent Claim
72 words
A field effect transistor comprising: a semiconductor epitaxial substrate; a T-shaped gate electrode (15) and source and drain electrodes (13a,13b) disposed on said substrate; and said T-shaped gate electrode (15) comprising a lower electrode (14) having a gate length of 0.25 micron or less and an upper electrode (10) which is formed on said lower electrode (14) by pulse plating or electroless plating using said lower electrode (14) as a feeding electrode.
Claim 10
Dependent Claim
43 words
The field effect transistor of claim 6 further comprising an insulating film (12) having a thickness of 500 angstroms or less and covering the whole surface of said T-shaped gate electrode and said semiconductor epitaxial substrate except for said source and drain electrodes.
References Cited (Backward Citations)
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