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EP0571093A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Integrated circuit printhead for an ink jet printer including an integrated identification circuit

Assignee: HP Inc
•
Filing: 1993-04-30
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Granted: —
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Expires: 2013-04-30
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Abstract

Abstract An integrated circuit for use in the printhead of an ink jet printer includes an array circuit (44) for heating an ink reservoir to produce a pattern of ink jets, the array circuit including a plurality of resistor cells (39) arranged into rows and columns. A corresponding number of row and column lines are coupled to the integrated circuit array for selecting and energizing the resistor cells according to the desired printing pattern. An identification circuit (45) integrated into the same substrate as the array circuit includes one or more programmable paths, the programmable paths corresponding and coupled to each row line. The programmable paths each include the serial combination of a programmable fuse and an active device. The opposite end of the programmable paths are coupled together at a common node, which in turn is coupled to an output circuit for providing a single output signal in response to a polling of the row lines. The identification circuit can be programmed and polled without adversely affecting or energizing the array circuit.

Inventors

  • 👤 George Barbehenn
  • 👤 James R. Hulings
  • 👤 Rajeev Badyal
  • 👤 Ross R. Allen
  • 👤 Michael B. Saunders

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-04 00:26
CPC Classifications
B; B41; B41J; B41J2/00; B41J2/005; B41J2/01; B41J2/17; B41J2/175; B41J2/17503; B41J2/17543; B41J2/17546; B41J2/015; B41J2/04; B41J2/045; B41J2/04501; B41J2/04506; B41J2/04541; B41J2/04543; B41J2/04563; B41J2/0458; G; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; B41J2202/00; B41J2202/01; B41J2202/17

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 90 words
An integrated circuit for use in a printhead comprising: an array circuit (44) for heating an ink reservoir to produce a pattern of ink jets, the array circuit including a plurality of resistor cells (39) arranged in a predetermined number of rows and columns; a plurality of row and column lines coupled to the integrated circuit array for selecting at least one of the resistor cells; and an identification circuit (45) including a plurality of programmable paths, at least one of the paths corresponding and coupled to each row line.
Claim 2
Dependent Claim 37 words
A circuit as in claim 1 in which a first end of the programmable paths are coupled to the respective row line and a second end of the programmable paths are coupled together at a common node.
Claim 3
Dependent Claim 41 words
A circuit as in claim 2 in which the identification circuit further comprises an output means having an input coupled to the common node and an output for providing an output signal in response to a polling of the row lines.
Claim 4
Dependent Claim 40 words
A circuit as in claim 3 in which the output means comprises: a resistor (R1) coupled to the common node; and a transistor (Q1) having a control node coupled to the common node and a controlled node forming the output.
Claim 5
Dependent Claim 50 words
A circuit as in claim 3 in which the output is coupled to a thermal resistor divider, wherein the output provides circuit temperature information within a first voltage range and the output provides an output signal in response to the polling of the address lines within a second voltage range.
Claim 6
Dependent Claim 24 words
A circuit as in claim 1 in which the programmable paths each comprise the serial combination of a programmable fuse and an active device.
Claim 7
Dependent Claim 16 words
A circuit as in claim 6 in which the programmable fuse comprises a fusible polysilicon link.
Claim 8
Dependent Claim 14 words
A circuit as in claim 6 in which the active device comprises a diode.
Claim 9
Dependent Claim 15 words
A circuit as in claim 6 in which the active device comprises a field-effect transistor.
Claim 10
Dependent Claim 23 words
A circuit as in claim 1 in which the resistor cells further comprise a field-effect transistor for controlling current flow through the resistor.

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