EP0570951A2
Expired / Lapsed
EP
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Advanced parallel array processor mechanical packaging
Assignee: International Business Machines Corp
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Filing: 1993-05-19
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Granted: —
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Expires: 2013-05-19
Abstract
Abstract A parallel array processor is formed. Eight processors on a single chip have their own associated processing element, memory, and I/O and are interconnected with a hypercube based topology. These nodes are then interconnected, either by a hypercube, modified hypercube, or ring, or ring within ring network topology. The new architecture merges processor and memory with multiple PMEs in DRAM and has no memory access delays and uses all the pins for networking. The chip can be a single node of a fine-grained parallel processor. <IMAGE> <IMAGE>
Inventors
- 👤 Michael Charles Dapp
- 👤 James Warren Dieffenderfer
- 👤 Richard Ernest Miles
- 👤 Richard Edward Nier
- 👤 Vincent John Smoral
- 👤 James Robert Stupp
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 18:40
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17337; G06F15/76; G06F15/80; G06F15/8007; G06F15/803; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/30036; G06F9/38; G06F9/3885; G06F9/3887; G06F9/38873; F; F02; F02B; F02B75/00; F02B75/02; F02B2075/022; F02B2075/027
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
58 words
A computer package, comprising: a substrate and housing, a plurality of multi-processor memory elements within said housing on a chip configured in a quadflatpack with connections to a chip being made at all four sides, each chip containing eight or more processor memory eleements arranged to allow point-to-point connection at each of the four sides of the chip.
Claim 2
Dependent Claim
30 words
A computer package according to claim 1 configured in a quadflatpack form such that it can be brickwalled into into various 2 D and 3 D configurations in a package.
Claim 3
Dependent Claim
23 words
A computer package according to claim 1 wherein one chip of eight or more processor memory elements is a first level package module.
Claim 4
Dependent Claim
25 words
A computer package according to claim 1 wherein the chip is the size of a DRAM memory chip for a foundry which packages the chip.
Claim 5
Dependent Claim
23 words
A computer package according to claim 1 wherein the chip to one another in four directions for each connection is point to point.
Claim 6
Dependent Claim
32 words
A computer package according to claim 1 wherein the chip connect across 3 or more feet, point-to-point, multi-processor node to node, and still have proper control without the need of fiber optics.
Claim 7
Dependent Claim
30 words
A computer package according to claim 1 wherein the chip module broadcasts from node to node, with most data operations conducted in a node, so data path requirements are reduced.
Claim 8
Dependent Claim
21 words
A computer package according to claim 1 wherein the chip has a broadcast path primarily used as a controller routing tool.
Claim 9
Dependent Claim
25 words
A computer package according to claim 1 wherein the chip has a data stream which attaches to and runs in, a network communication path system.
Claim 10
Dependent Claim
52 words
A computer package according to claim 1 wherein the chip has a power system which is rated in multiplies the number of modules supported by about 2.5 or less watts per module, and such a five volt power supply is measures by multi-processor chip modules which dissipates about 2.2 watts per module.
Claim 11
Dependent Claim
32 words
A computer package according to claim 1 wherein the chip has a thermal design enhanced by the packaging and avoiding hot spots due to high dissipating parts mixed with low dissipating ones.
Claim 12
Dependent Claim
20 words
A computer package according to claim 1 wherein the chip package has multiple replicated dies within the same chip housing.
Claim 13
Dependent Claim
16 words
A computer package according to claim 1 wherein the chip package is an air cooled package.
Claim 14
Dependent Claim
22 words
A computer package according to claim 1 wherein the chip package has eight die on a substrate using a multiple chip module.
Claim 15
Dependent Claim
24 words
A computer package according to claim 1 wherein the chip package houses a plurality of die on a substrate using a multiple chip module.
Claim 16
Dependent Claim
41 words
A computer package according to claim 1 wherein the chip package with multiple processor memory element of eight or more on a chip in a dip, with pinouts fitting in a standard DRAM memory module, such as in a SIM module.
Claim 17
Dependent Claim
58 words
A computer package according to claim 1 wherein the chip package has plural copies of a replicated processor which is a memory with processor, and part of the memory can be assigned to a specific monitoring task, and another part, with a size programmatically defined, can be a massive global memory, addressed point-to-point, with broadcast to all capability.
Claim 18
Dependent Claim
31 words
A computer package according to claim 1 wherein the chip package can be replicated in modules to form a workstation, supercomputer, or controller, or other computer system with the same packages.
Claim 19
Dependent Claim
30 words
A computer package according to claim 1 wherein the chip package provides array of memory, with inbuilt CPU chips and I/0, functions as a PME of massively parallel application processors.
References Cited (Backward Citations)
No citation records indexed.
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