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EP0563997A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Memory card apparatus

Assignee: Toshiba Corp
•
Filing: 1993-04-02
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Granted: —
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Expires: 2013-04-02
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Abstract

Abstract A memory card apparatus has an EEPROM (17) as a semiconductor memory. Each time data is written in the EEPROM (17), link data representing a recording location of the data is written and managed in a link table (18). The link table (18) has a flag region (F) with a flag which is set when data write in the EEPROM (17) is reset when the link data has completely been written in the link table (18). In case of card removal during operation or power failure, the flag set in the flag region (F) of the link table (18) is not reset and remains. Thus, by checking the flag area (f) of the link table (18), the occurrence of card removal during operation or power failure can be detected, and various countermeasures can be conducted. Thus, the correspondency between the recorded contents in the EEPROM (17) and the contents in the link table (18) can be maintained as much as possible.

Inventors

  • 👤 Kazuo c/o Intellectual Property Div. Konishi
  • 👤 Shimpei c/o Intellectual Property Div. Yoshioka
  • 👤 Koji c/o Intellectual Property Div. Maruyama
  • 👤 Tomoyuki c/o Intellectual Property Div. Maekawa
  • 👤 Toshiaki c/o Intellectual Property Div. Sato

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 18:42
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/21; H04N1/2104; H04N1/2112; G; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K7/00; G06K7/0008; G06Q; G06Q20/00; G06Q20/30; G06Q20/34; G06Q20/341; G07; G07F; G07F7/00; G07F7/08; G07F7/0806; G07F7/0813; G07F7/082; G07F7/10; G07F7/1008; H04N1/2158; H04N2101/00

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 132 words
A memory card apparatus having an EEPROM (17) as a semiconductor memory, wherein when data is written in the EEPROM (17), an external address set for writing data in the EEPROM (17) is associated with an actual address for data write in the EEPROM (17) via a link table (18), and link data is rewritten and managed in the link table (18) in the state in which the data write in the EEPROM (17) has been completed, characterized in that a flag region (F) is provided in the link table (18), a flag of the flag region (F) is set when data write in the EEPROM (17) is requested, and the flag of the flag region (F) is reset when the link data has completely been written in the link table (18).
Claim 2
Dependent Claim 47 words
The memory card apparatus according to claim 1, characterized in that said flag region includes a plurality of flag areas (181a, 182a,...) which are associated with a plurality of link data regions (181, 182,...) provided in advance in the link table (18) for recording the link data.
Claim 3
Dependent Claim 65 words
The memory card apparatus according to claim 1, characterized by further comprising control means for reading out that data in the EEPROM (17), which is associated with the link data in the link table (18), and stores the read-out data, and then writing the stored data in the EEPROM (17) in the state in which all memory regions in the EEPROM (17) have been erased.
Claim 4
Dependent Claim 119 words
The memory card apparatus according to claim 1, characterized in that said link table (18) comprises a first link table (20) in which the link data is written in the state wherein the data has been written in the EEPROM (17) and a second link table (21) into which the contents of the first link table (20) is transferred in the state wherein the link data has been written in the first link table (20), and when the contents of the first link table (20) do not coincide with the contents of the second link table (21), the contents of the second link table (21) is corrected on the basis of the contents of the first link table (20).
Claim 5
Dependent Claim 39 words
The memory card apparatus according to claim 1, characterized in that when an address/data switch signal (A/D) represents an address input and a read/write switch signal (R/W) is set in a data read-out state, card status information is output.
Claim 6
Dependent Claim 49 words
The memory card apparatus according to claim 5, characterized in that a bus clock (BCK) is provided in the output state of the card status information, and thereby a flag byte representing the internal condition of the memory card apparatus are output in place of the card status information.
Claim 7
Dependent Claim 49 words
The memory card apparatus according to claim 6, characterized in that said flag bytes represent messages relating to an error occurrence, an end of life of the memory card apparatus, a fault occurrence, card removal during operation, a need to call a serviceman, erroneous address designation, and write protect.
Claim 8
Dependent Claim 26 words
The memory card apparatus according to claim 1, characterized in that in the EEPROM (17) an erase data unit is greater than a write data unit.
Claim 9
Dependent Claim 90 words
The memory card apparatus according to claim 8, characterized in that when data write is requested, an empty record region in the EEPROM (17), which corresponds to the erase data unit, is searched, and first data to be newly written and third data are written in the searched empty record region in units of write data, the third data being contained in a record region of the erase data unit including second data which is to be replaced by the first data but is not related to the data write.

References Cited (Backward Citations)

US4877945A Cited
EP0292658A2 Cited
EP0492450A2 Cited

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