EP0535822A1
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EP
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Methods and apparatus for locking arbitration on a remote bus
Assignee: Sun Microsystems Inc
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Filing: 1992-09-15
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Granted: —
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Expires: 2012-09-15
Abstract
Abstract A master bus interconnecting multiple masters is coupled via any number of intervening buses to a slave bus interconnecting multiple slaves and masters. A lock arbiter signal is passed to each successive bus-to-bus interface concurrent with an instruction issued by a master accessing a slave on a remote bus. Address, control, data, and lock arbiter signals are buffered in successive intervening bus-to-bus interfaces including the bus-to-bus interface to the slave bus. The lock arbiter signal when received by the slave bus-to-bus interface will set a lock arbiter register within bus slave bus-to-bus interface. Setting the lock arbiter register once a target slave has been accessed prevents any other master operating on the remote bus from using the remote bus or connecting to the remote bus-to-bus interface. Indivisible sequences of bus operations targeted for the target slave may be confined to the bus to which the target slave is coupled although intervening buses and bus-to-bus interfaces may be disconnected and reassigned pending completion of the indivisible sequence.
Inventors
- 👤 Charles E. Narad
- 👤 Neil Macavoy
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 08:57
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F15/00; G06F15/16; G06F15/163; G06F15/17; G06F13/362; G06F15/173
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
111 words
A method for preserving an indivisible sequence of bus operations on a remote bus within a multiple processor computer system, said method comprising the steps of: issuing a slave access signal including an operation command by an accessing master directed to a target slave; intercoupling said accessing master to a multiplicity of buses; receiving and storing said slave access signal in a plurality of bus-to-bus interfaces; coupling a remote bus-to-bus interface via a remote bus to a target slave; reserving said remote bus for use only by said accessing master to access said target slave, and relinquishing said buses, and bus-to-bus interfaces connecting said accessing master to said remote bus-to-bus interface.
Claim 2
Independent Claim
111 words
A method for preserving an indivisible sequence of bus operations on a remote bus within a multiple processor computer system, said method comprising the steps of: issuing a slave access signal including an operation command by an accessing master directed to a target slave; intercoupling said accessing master to a multiplicity of buses; receiving and storing said slave access signal in a plurality of bus-to-bus interfaces; coupling a remote bus-to-bus interface via a remote bus to a target slave; reserving said remote bus for use only by said accessing master to access said target slave, and relinquishing said buses, and bus-to-bus interfaces connecting said accessing master to said remote bus-to-bus interface.
Claim 3
Dependent Claim
19 words
The method according to claim 1, wherein reserving said remote bus is accomplished by asserting a bus busy signal.
Claim 4
Dependent Claim
26 words
The method as set forth in claim 1, wherein reserving said remote bus is accomplished by preventing arbitration for a master other than said accessing master.
Claim 5
Dependent Claim
19 words
The method as set forth in claim 3, wherein preventing arbitration is accomplished by setting a lock arbiter register.
Claim 6
Dependent Claim
41 words
The method as set forth in claim 4, wherein setting said lock arbiter register is accomplished by said accessing master issuing a lock arbitration signal, said buses and bus-to-bus interfaces thereafter transmitting said lock arbitration signal to said remote bus-to-bus interface.
Claim 7
Dependent Claim
38 words
The method as set forth in claim 5, wherein setting said lock arbiter register further comprises setting said lock arbiter register according to said lock arbitration signal accompanying particular bus operations during said indivisible sequence of bus operations.
Claim 8
Dependent Claim
22 words
The method as set forth in claim 5, wherein said lock arbitration signal is transmitted substantially contemporaneously with said slave access signal.
Claim 9
Dependent Claim
34 words
The method according to claim 1, wherein said accessing master, buses and bus-to-bus interfaces except said remote bus-to-bus interface are relinquished according to a relinquish and retry signal issued by said remote bus-to-bus interface.
Claim 10
Dependent Claim
27 words
The method as set forth in claim 1, wherein said plurality of buses comprises at least one intervening bus between said master bus and said remote bus.
Claim 11
Dependent Claim
33 words
The method as set forth in claim 1, wherein reserving said remote bus for use only by said target slave comprises locking arbitration for said remote bus according to said lock arbitration signal.
Claim 12
Dependent Claim
107 words
The method according to claim 1 wherein said lock arbiter register remains in a set state until after said accessing master issues a final operation of said indivisible sequence of bus operations, said method further comprising the following additional steps: reissuing said slave access signal previously issued by said accessing master to reaccess said target slave; sequentially recoupling said accessing master to said plurality of buses, bus-to-bus interfaces, and remote bus-to-bus interface; performing said final operation by said target slave; sequentially disconnecting said remote bus, said bus-to-bus interfaces including said remote bus-to-bus interfaces, and said accessing master from said target slave, and clearing said lock arbiter register.
Claim 13
Dependent Claim
134 words
A bus interface system for preserving an indivisible sequence of bus operations on a remote bus within a multiple processor computer system, said bus interface system comprising: an accessing master issuing a slave access signal including a first operation of said indivisible sequence of bus operations; a multiplicity of buses intercoupled to said accessing master; a plurality of bus-to-bus interfaces including a remote bus-to-bus interface intercoupling said multiplicity of buses, said bus-to-bus interfaces receiving and storing said slave access signal; a target slave coupled via a remote bus to said remote bus-to-bus interface; when said target slave receives said first operation of said indivisible sequence of bus operations, said remote bus-to-bus interface issuing a relinquish and retry signal causing said accessing master, buses, and bus-to-bus interfaces to sequentially disconnect from said remote bus-to-bus interface.
Claim 14
Dependent Claim
134 words
A bus interface system for preserving an indivisible sequence of bus operations on a remote bus within a multiple processor computer system, said bus interface system comprising: an accessing master issuing a slave access signal including a first operation of said indivisible sequence of bus operations; a multiplicity of buses intercoupled to said accessing master; a plurality of bus-to-bus interfaces including a remote bus-to-bus interface intercoupling said multiplicity of buses, said bus-to-bus interfaces receiving and storing said slave access signal; a target slave coupled via a remote bus to said remote bus-to-bus interface; when said target slave receives said first operation of said indivisible sequence of bus operations, said remote bus-to-bus interface issuing a relinquish and retry signal causing said accessing master, buses, and bus-to-bus interfaces to sequentially disconnect from said remote bus-to-bus interface.
Claim 15
Dependent Claim
32 words
The bus interface system as set forth in claim 12, wherein said remote bus-to-bus interface reserves said remote bus for use only by said accessing master by asserting a bus busy signal.
Claim 16
Dependent Claim
44 words
The bus interface system as set forth in claim 12, wherein said remote bus-to-bus interface further comprises a lock arbiter register, said remote bus-to-bus interface reserving said remote bus for use only by said accessing master by setting said lock arbiter register prevents arbitration.
Claim 17
Dependent Claim
42 words
The bus interface system as set forth in claim 14, wherein said lock arbiter register is set by said accessing master issuing a lock arbitration signal, said buses and bus-to-bus interfaces sequentially transmitting said lock arbitration signal to said remote bus-to-bus interface.
Claim 18
Dependent Claim
36 words
The bus interface system as set forth in claim 15, wherein said remote bus-to-bus interface sets said lock arbiter register according to said lock arbitration signal accompanying particular operations of said indivisible sequence of bus operations.
Claim 19
Dependent Claim
29 words
The bus interface system as set forth in claim 17, wherein said remote bus-to-bus interface sets said lock arbiter register when said lock arbitration signal accompanies a READ operation.
Claim 20
Dependent Claim
29 words
The bus interface system as set forth in claim 17, wherein said remote bus-to-bus interface clears said lock arbiter register when said lock arbitration signal accompanies a WRITE operation.
Claim 21
Dependent Claim
33 words
The bus interface system as set forth in claim 15, wherein said accessing master issues said lock arbitration signal substantially contemporane- ouslywith said slave access signal during said indivisible sequence of bus operations.
Claim 22
Dependent Claim
28 words
The bus interface system as setforth in claim 12, wherein said plurality of buses comprises at least one intervening bus between said master bus and said remote bus.
Claim 23
Dependent Claim
39 words
The bus interface system as set forth in claim 20, wherein said buses and bus-to-bus interfaces except said remote bus-to-bus interface may be accessed by a master other than said accessing master during said indivisible sequence of bus operations.
Claim 24
Dependent Claim
96 words
The bus interface system according to claim 14, wherein: said lock arbiter register remains set until after said accessing master issues a final operation of said indivisible sequence of bus operations; said accessing master reissues said slave access signal previously issued to reaccess said target slave; said accessing master sequentially reac- cesses said plurality of buses, bus-to-bus interfaces, and remote bus-to-bus interface; said target slave executes said final operation; said remote bus, said bus-to-bus interfaces including said remote bus-to-bus interfaces, and said accessing master sequentially disconnect from said target slave, and said lock arbiter is cleared.
Claim 25
Dependent Claim
179 words
In a computer system comprising a master bus interconnected to a slave bus via a plurality of bus-to-bus interfaces, a bus interface system for preserving on a remote bus an indivisible sequence of bus operations issued by an accessing master coupled to said master bus, said indivisible sequence of bus operations intended for execution by a target slave coupled to said slave bus, said system comprising: a first bus-to-bus interface coupled to said master bus for receiving and storing a slave access signal including an operation command and a lock arbitration signal issued by said accessing master; a second bus-to-bus interface including a lock arbiter register coupled to said target slave via said slave bus and via at least one intervening bus, said second bus-to-bus interface receiving and storing said slave access signal and lock arbitration signal; when said target slave receives a first operation of said indivisible sequence of bus operations, said second bus-to-bus interface issuing a relinquish and retry signal causing said accessing master, buses, and master bus-to-bus interface to sequentially disconnect from said second bus-to-bus interface.
Claim 26
Dependent Claim
179 words
In a computer system comprising a master bus interconnected to a slave bus via a plurality of bus-to-bus interfaces, a bus interface system for preserving on a remote bus an indivisible sequence of bus operations issued by an accessing master coupled to said master bus, said indivisible sequence of bus operations intended for execution by a target slave coupled to said slave bus, said system comprising: a first bus-to-bus interface coupled to said master bus for receiving and storing a slave access signal including an operation command and a lock arbitration signal issued by said accessing master; a second bus-to-bus interface including a lock arbiter register coupled to said target slave via said slave bus and via at least one intervening bus, said second bus-to-bus interface receiving and storing said slave access signal and lock arbitration signal; when said target slave receives a first operation of said indivisible sequence of bus operations, said second bus-to-bus interface issuing a relinquish and retry signal causing said accessing master, buses, and master bus-to-bus interface to sequentially disconnect from said second bus-to-bus interface.
Claim 27
Dependent Claim
32 words
The bus interface system as set forth in claim 23, wherein said second bus-to-bus interface reserves said slave bus for use only by said accessing master by asserting a bus busy signal.
Claim 28
Dependent Claim
23 words
The bus interface system as set form in claim 23, wherein said lock arbiter register, when set, prevents arbitration on said remote bus.
Claim 29
Dependent Claim
39 words
The bus interface system as set forth in claim 25, wherein after said accessing master issues a lock arbitration signal, said master bus-to-bus interface and said buses thereafter sequentially transmitting said lock arbitration signal to said second bus-to-bus interface.
Claim 30
Dependent Claim
36 words
The bus interface system as set forth in claim 26, wherein said second bus-to-bus interface sets said lock arbiter register according to said lock arbitration signal accompanying particular operations during said indivisible sequence of bus operations.
Claim 31
Dependent Claim
26 words
The bus interface system as set forth in claim 27, wherein said lock arbiter register is set when said lock arbitration signal accompanies a READ operation.
Claim 32
Dependent Claim
26 words
The bus interface system as set forth in claim 27, wherein said lock arbiter register is cleared when said lock abitration signal accompanies a WRITE operation.
Claim 33
Dependent Claim
32 words
The bus interface system as set forth in claim 23, wherein said accessing master issues said lock arbitration signal substantially contemporane- ouslywith said slave access signal during said indivisible sequence of operations.
Claim 34
Dependent Claim
50 words
The bus interface system as set forth in claim 23, wherein said buses and bus-to-bus interfaces except said remote bus-to-bus interface may be accessed by a master other than said accessing master after said second bus-to-bus interface issues said relinquish and retry signal during said indivisible sequence of bus operations.
Claim 35
Dependent Claim
92 words
The bus interface system according to claim 23, wherein: said lock arbiter register remains set until after said accessing master issues a final operation of said indivisible sequence of bus operations; said accessing master reissues said slave access signal previously issued to reaccess said target slave; said accessing master sequentially reac- cesses said buses and bus-to-bus interfaces; said target slave performs said final operation; said remote bus, said bus-to-bus interfaces including said second bus-to-bus interfaces, and said accessing master sequentially disconnect from said target slave, and said lock arbiter register is cleared.
References Cited (Backward Citations)
EP0291907A2
Cited
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