EP0535807A2
Expired / Lapsed
EP
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Linear and orthogonal expansion of array storage in multiprocessor computing systems
Assignee: Tandem Computers Inc
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Filing: 1992-09-07
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Granted: —
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Expires: 2012-09-07
Abstract
Abstract A multiprocessing computer system with data storage array systems allowing for linear and orthogonal expansion of data storage capacity and bandwidth by means of a switching network coupled between the data storage array systems and the multiple processors. The switching network provides the ability for any CPU to be directly coupled to any data storage array. By using the switching network to couple multiple CPU's to multiple data storage array systems, the computer system can be configured to optimally match the I/O bandwidth of the data storage array systems to the I/O performance of the CPU's.
Inventors
- 👤 Mark Walker
- 👤 Albert S. Lui
- 👤 Harald Sammer
- 👤 Wing M. Chan
- 👤 William T. Fuller
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 17:04
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/17368; G06F15/17375
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
62 words
A multiprocessing computer system comprising: a. a plurality of data processing units; b. at least one data storage array system; c. switching network means, coupled to the plurality of data processing units and to at least one data storage array system, for establishing a communications link between at least one selected data processing unit and at least one data storage array system.
Claim 2
Dependent Claim
62 words
A multiprocessing computer system comprising: a. a plurality of data processing units; b. at least one data storage array system; c. switching network means, coupled to the plurality of data processing units and to at least one data storage array system, for establishing a communications link between at least one selected data processing unit and at least one data storage array system.
Claim 3
Dependent Claim
16 words
The multiprocessing computer system of claim 1, wherein the switching network means comprises a cross-point switch.
Claim 4
Dependent Claim
16 words
The multiprocessing computer system of claim 1, wherein the switching network means comprises a multi-stage switch.
Claim 5
Dependent Claim
243 words
A linearly and orthogonally expandable multiprocessing computer system comprising: a. at least two data processing units inter- coupled by at least one interprocessor bus, the at least one bus having sufficient capacity to be coupled to at least one additional data processing unit, each data processing unit having a respective input/output data transfer rate; b. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be include at least one additional data processing unit, each data storage array unit having a respective input/output data transfer rate; c. switching network means, coupled to the data processing units and to at least one data storage array system, for establishing a communications link between at least one selected data processing unit and at least one data storage array system, the switching network means having an input/output data transfer rate; wherein the input/output data transfer rate of the switching network means at least equals the sum of input/output data transfer rates of either the data processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional data processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the data processing units.
Claim 6
Dependent Claim
243 words
A linearly and orthogonally expandable multiprocessing computer system comprising: a. at least two data processing units inter- coupled by at least one interprocessor bus, the at least one bus having sufficient capacity to be coupled to at least one additional data processing unit, each data processing unit having a respective input/output data transfer rate; b. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be include at least one additional data processing unit, each data storage array unit having a respective input/output data transfer rate; c. switching network means, coupled to the data processing units and to at least one data storage array system, for establishing a communications link between at least one selected data processing unit and at least one data storage array system, the switching network means having an input/output data transfer rate; wherein the input/output data transfer rate of the switching network means at least equals the sum of input/output data transfer rates of either the data processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional data processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the data processing units.
Claim 7
Dependent Claim
53 words
The multiprocessing computer system of claim 4, wherein additional data storage units or additional data processing units are added so that the sum of the input/output data transfer rates of the data processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.
Claim 8
Dependent Claim
16 words
The multiprocessing computer system of claim 4, wherein the switching network means comprises a cross-point switch.
Claim 9
Dependent Claim
16 words
The multiprocessing computer system of claim 4, wherein the switching network means comprises a multi-stage switch.
References Cited (Backward Citations)
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