EP0525831A1
Expired / Lapsed
EP
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A method and apparatus for coordinating execution of an instruction by a coprocessor
Assignee: Motorola Solutions Inc
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Filing: 1984-03-26
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Granted: —
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Expires: 2004-03-26
Abstract
Abstract A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.
Inventors
- 👤 John Zolnowsky
- 👤 Michael Gruess
- 👤 David Mothersole
- 👤 Stanley E. Groves
- 👤 Douglas B. Macgregor
- 👤 Van B Shahan
- 👤 Donald L Tietjen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 03:46
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3861; G06F9/3877; G06F9/3879; G06F9/3881
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
100 words
In a first data processor adapted for executing an instruction contingent upon a condition existing in a second data processor: first means for receiving said instruction; second means for determining a condition upon which the execution of said instruction is contingent; third means for writing to said second processor a request that said second processor evaluate said condition and provide an indication of whether, as a result of said evaluation, said condition was determined by said second processor to have been satisfied; fourth means for reading said indication; and fifth means for selectively executing said instruction based upon said indication.
Claim 2
Dependent Claim
100 words
In a first data processor adapted for executing an instruction contingent upon a condition existing in a second data processor: first means for receiving said instruction; second means for determining a condition upon which the execution of said instruction is contingent; third means for writing to said second processor a request that said second processor evaluate said condition and provide an indication of whether, as a result of said evaluation, said condition was determined by said second processor to have been satisfied; fourth means for reading said indication; and fifth means for selectively executing said instruction based upon said indication.
Claim 3
Independent Claim
90 words
A method for a first data processor to execute an instruction contingent upon a condition existing in a second data processor, comprising the steps of: receiving said instruction; determining a condition upon which the execution of said instruction is contingent; writing to said second processor a request that said second processor evaluate said condition and provide an indication of whether, as a result of said evaluation, said condition was determined by said second processor to have been satisfied; reading said indication; and selectively executing said instruction based upon said indication.
Claim 4
Independent Claim
90 words
A method for a first data processor to execute an instruction contingent upon a condition existing in a second data processor, comprising the steps of: receiving said instruction; determining a condition upon which the execution of said instruction is contingent; writing to said second processor a request that said second processor evaluate said condition and provide an indication of whether, as a result of said evaluation, said condition was determined by said second processor to have been satisfied; reading said indication; and selectively executing said instruction based upon said indication.
Claim 5
Dependent Claim
92 words
In a first data processor adapted for cooperating with a second data processor in the execution by said second processor of an instruction contingent upon a condition existing in said first data processor: first means for receiving from said second processor a request that said first processor evaluate the condition upon which the execution of said instruction by said second processor is contingent; second means for evaluating said condition; and third means for providing an indication of whether, as a result of said evaluation, said condition was determined to have been satisfied.
Claim 6
Dependent Claim
92 words
In a first data processor adapted for cooperating with a second data processor in the execution by said second processor of an instruction contingent upon a condition existing in said first data processor: first means for receiving from said second processor a request that said first processor evaluate the condition upon which the execution of said instruction by said second processor is contingent; second means for evaluating said condition; and third means for providing an indication of whether, as a result of said evaluation, said condition was determined to have been satisfied.
Claim 7
Independent Claim
88 words
A method for a first data processor to cooperate with a second data processor in the execution by said second processor of an instruction contingent upon a condition existing in said first data processor, comprising the steps of: receiving from said second processor a request that said first processor evaluate the condition upon which the execution of said instruction by said second processor is contingent; evaluating said condition; and providing an indication of whether, as a result of said evaluation, said condition was determined to have been satisfied.
Claim 8
Independent Claim
88 words
A method for a first data processor to cooperate with a second data processor in the execution by said second processor of an instruction contingent upon a condition existing in said first data processor, comprising the steps of: receiving from said second processor a request that said first processor evaluate the condition upon which the execution of said instruction by said second processor is contingent; evaluating said condition; and providing an indication of whether, as a result of said evaluation, said condition was determined to have been satisfied.
References Cited (Backward Citations)
No citation records indexed.
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