EP0522869A2
Expired / Lapsed
EP
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Digital signal processing apparatus for signals having different data configurations
Assignee: Sony Corp
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Filing: 1992-07-10
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Granted: —
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Expires: 2012-07-10
Abstract
Abstract Processing (such as recording and/or reproducing) apparatus is capable of processing first and second digital signals with the same processing device, even when the two digital signals have differing first and second data configurations, the first data configuration containing a greater amount of data than the second data configuration. Predetermined data is added (23) to the second digital signal so as to convert the second data configuration to the first data configuration. An error processor (4A), such as an error detection/correction generator or an error corrector, and capable of processing the first data configuration, selectively (21) receives either the first digital signal or the converted second digital signal, so as to carry out the same error processing operation on either one of the digital signals. The first digital signal may be a video signal, and the second digital signal may be an audio signal.
Inventors
- 👤 Hajime C/O Patents Division Inoue
- 👤 Hiroshi c/o Patents Division Okada
- 👤 Masaki c/o Patents Division Oguro
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 17:58
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1833; H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/92; H04N5/926; H04N5/9265; H04N5/9267; H04N5/9268; H04N5/93; H04N5/94; H04N5/945; H04N9/00; H04N9/79; H04N9/7921; H04N9/7925; H04N5/9201; H04N5/9206; H04N5/9208
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
118 words
Apparatus for processing first and second digital signals with the same processing device, said first and second digital signals having respective first and second data configurations which differ from each other, wherein the first data configuration contains a greater amount of data than said second data configuration, said apparatus comprising: adding means (23) for adding known, predetermined data to said second digital signal thereby converting said second data configuration to said first data configuration; error processing means (4A) for processing digital signals in said first data configuration; and change over means (21) coupled to said error processing means (4A) for selectively supplying said first digital signal or the converted second digital signal to said error processing means (4A).
Claim 2
Dependent Claim
23 words
Apparatus according to claim 1, wherein said first digital signal comprises digitized video data and said second digital signal comprises digitized audio data.
Claim 3
Dependent Claim
57 words
Apparatus according to claim 1 or claim 2, wherein said first and second data configurations are product codes respectively formed of a k₁ x k₂ array of columns and rows of bytes and a k′₁ x k′₂ array of columns and rows of bytes, wherein at leas t one of k₁ > k′₁ and k₂ > k′₂.
Claim 4
Dependent Claim
32 words
Apparatus according to claim 3, wherein said adding means includes means (23) for adding said known, predetermined data to the second product code so that k′₁ = k₁ and k′₂ = k₂.
Claim 5
Dependent Claim
60 words
Apparatus according to claim 4, wherein said known, predetermined data is formed of plural bytes of 0 data, and said adding means (23) is operative to add k₁ - k′₁ bytes of 0 data to each row of said second product code and to add k₂ - k′₂ bytes of 0 data to each column of said second product code.
Claim 6
Dependent Claim
63 words
Apparatus according to claim 4, wherein said known, predetermined data is formed of plural bytes of a preset pattern, and said adding means (23) is operative to add k₁ - k′₁ bytes of said preset pattern to each row of said second product code and to add k₂ - k′₂ bytes of said preset pattern to each column of said second product code.
Claim 7
Dependent Claim
35 words
Apparatus according to claim 4, wherein said adding means includes interleave means (118, 119) for interleaving said known, predetermined data into said k′₁ x k′₂ array of columns and rows of said second product code.
Claim 8
Dependent Claim
47 words
Apparatus according to claim 7, wherein said interleave means includes means (124) for generating interleave ID data representing positions in said k′₁ x k′₂ array in which said known, predetermined data is interleaved, and means for appending said interleave ID data to said converted second digital signal.
Claim 9
Dependent Claim
51 words
Apparatus according to claim 8, wherein said means for appending comprises summing means coupled to said error processing means (120) and said means (124) for generating interleave ID data for adding to the processed, converted second digital signal said interleave ID data, thereby identifying the positions of said interleaved predetermined data.
Claim 10
Dependent Claim
38 words
Apparatus according to any one of the preceding claims, comprising deletion means (29) coupled to said error processing means (9A) for deleting from the processed, converted second digital signal the known predetermined data that had been added thereto.
Claim 11
Dependent Claim
45 words
Apparatus according to claim 10, wherein said deletion means comprises storage means (29) for storing the processed, converted second digital signal, and read-out means for reading out from said storage means (29) substantially all of the stored digital signal therein except said known predetermined data.
Claim 12
Dependent Claim
75 words
Apparatus according to any one of the preceding claims, wherein said adding means comprises digital signal processing means (30) coupled to receive said second digital signal and to generate a digital pattern as a function of the data content of said second digital signal for reducing a low frequency component of said second digital signal, and means (23) for appending the generated digital pattern to said second digital signal to convert said second data configuration.
Claim 13
Dependent Claim
53 words
Apparatus according to claim 12, wherein said generated digital pattern is a selected one of a plurality of patterns, and said digital signal processing means (30) includes means for generating pattern ID data to identify the selected digital pattern and for adding said pattern ID data to the processed, converted second digital signal.
Claim 14
Dependent Claim
95 words
Apparatus according to any one of the preceding claims, wherein said second digital signal includes an ID field containing pattern ID data which identifies a selected one of a plurality of digital patterns, and said adding means comprises detecting means (31) for detecting said pattern ID data to generate the identified digital pattern for reducing a low frequency component of said second digital signal, and means (28) for appending the generated digital pattern to said second digital signal and thereby convert said second data configuration of said second digital signal to said first data configuration.
Claim 15
Dependent Claim
52 words
Apparatus according to any one of the preceding claims, wherein said error processing means comprises error detection/correction generating means (4A; 120) for generating error detection/correction data in response to the digital signal supplied thereto and for adding said error detection/correction data to said supplied digital signal thereby to provide error-coded digital signals.
Claim 16
Dependent Claim
33 words
Apparatus according to claim 15, wherein said error detection/correction generating means (4A; 120) comprises outer error coding means for generating outer parity bytes and inner error coding means for generating inner parity bytes.
Claim 17
Dependent Claim
52 words
Apparatus according to any one of the preceding claims, wherein the digital signal supplied to said error processing means (9A; 145) includes error detection/correction data, and said error processing means (9A; 145) comprises error correcting means responsive to said error detection/correction data for detecting and correcting errors in the supplied digital signal.
Claim 18
Dependent Claim
18 words
Apparatus according to claim 15, claim 16 or claim 17, wherein said error detection/correction data is parity data.
Claim 19
Dependent Claim
20 words
Apparatus according to claim 1, wherein said first and second digital signals comprise digitized audio signals of different clock rates.
Claim 20
Dependent Claim
17 words
Apparatus according to claim 15 or claim 16, including recording means for recording said error-coded digital signals.
Claim 21
Dependent Claim
59 words
Apparatus according to any one of the preceding claims, wherein said adding means (23) comprises means for determining a difference in the quantity of data contained in said first and second digital signals in a given period of time, and means for adding to said second digital signal an amount of known, predetermined data substantially equal to said difference.
Claim 22
Dependent Claim
139 words
Apparatus according to claim 21, wherein said means for adding comprises product code encoding means for encoding digital signals supplied thereto in product code configuration in a k₁ x k₂ array of columns and rows, means for converting the bit rate of said second digital signal to that of said first digital signal, means for supplying that bit-rate converted second digital signal to said product code encoding means for encoding in product code configuration in a k′₁ x k′₂ array of columns and rows, wherein k₁ > k′₁ and/or k₂ > k′₂, and means for adding k₁ - k′₁ bytes of known, predetermined data to respective rows of the product code configuration of the second digital signal and k₂ - k′₂ bytes of known, predetermined data to respective columns of said product code configuration of the second digital signal.
Claim 23
Dependent Claim
42 words
Apparatus according to claim 17, or claim 18 when dependent on claim 17, comprising reproducing means for reproducing said first and second digital signals from a record medium for supply to said adding means (28) and said error correcting means (9A; 145).
Claim 24
Dependent Claim
145 words
Apparatus according to claim 23, wherein said first and second digital signals are derived from original data signals having different bit rates, each of the digital signals being recorded with error code data for error correction when reproduced, said second digital signal having known, predetermined data interleaved therein, and wherein said apparatus comprises converting means (147) for converting said second digital signal from said same data configuration to a second, different data configuration by deleting the interleaved known, predetermined data, rate changing means (151) coupled to said converting means (147) for restoring the original bit rate to the converted, second digital signal, digital-to-analog converting means (150) for converting the error-corrected first digital signal to analog form, and means (148) for selectively supplying the converted second digital signal to said rate changing means (151) or the error-corrected first digital signal to said digital-to-analog converting means (150).
Claim 25
Dependent Claim
47 words
Apparatus according to claim 24, wherein said second digital signals include ID data recorded therewith representing said original bit rate and selectively enabling said converting means (147), and including ID detecting means (146) for detecting said ID data and supplying said ID data to said converting means.
Claim 26
Dependent Claim
44 words
Apparatus according to claim 25, wherein said ID detecting means (146) is coupled to said error correcting means (145), and said error correcting means (145) includes means responsive to said interleave position data for replacing said known, predetermined data with a "clean" version thereof.
Claim 27
Dependent Claim
72 words
Apparatus according to claim 26, wherein the same data configuration comprises a k₁ x k₂ product code, and said converting means (147) is operative to convert said k₁ x k₂ product code to a data configuration of less data at a bit rate substantially equal to the bit rate of said first digital signal and supply the converted product code to said rate changing means (151) as said converted, second digital signal.
Claim 28
Dependent Claim
96 words
Apparatus according to claim 25, claim 26 or claim 27, wherein said rate changing means comprises memory means (151) for temporarily storing said converted, second digital signal, write clock means (153) for generating write clock signals at a bit rate substantially equal to the bit rate of said first digital signal for writing said converted, second digital signal into said memory means (151), and read clock means (153) responsive to said ID data for generating read clock signals at the original bit rate of said second digital signal for reading out said converted, second digital signal.
References Cited (Backward Citations)
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