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EP0522689A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semiconductor memory device using SRAM cells

Assignee: JFE Steel Corp
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Filing: 1992-05-12
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Granted: —
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Expires: 2012-05-12
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Abstract

Abstract A semiconductor memory device of the SRAM type includes a memory cell including a pair of inverters each having a resistor and a driving transistor connected in series forming a storage node at the junction point thereof. Switching transistors in the memory cell are respectively connected between the storage nodes and bit lines. A film thickness of a gate oxide film of each of the switching transistors (transfer MOS transistors) is larger than a film thickness of a gate oxide film of each of the driving transistors (driver MOS transistors).

Inventors

  • 👤 Makoto c/o Technical Res. Division Motoyoshi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 08:20
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15; H10B10/18; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0144

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 136 words
In a semiconductor memory device comprising: a memory cell including a pair of inverters, each of said inverters having a load member and a driving transistor connected in series, an output of one inverter being connected to an input of the other inverter and an output of the other inverter being connected to an input of one inverter, and storage nodes respectively constituted by junction points in said pair of inverters; and switching transistors each connected between corresponding one of the storage nodes and a bit line, said each switching transistor having a gate connected to a word line; the improvement in which: a film thickness of a gate oxide film of said each switching transistor is thicker than a film thickness of a gate oxide film of said driving transistor in each of said inverters.
Claim 2
Dependent Claim 46 words
A semiconductor memory device according to claim 1, wherein the film thickness of the gate oxide film of said driving transistor is equal to a film thickness of a gate oxide film of all transistors having a metal-oxide semiconductor structure and located in a peripheral circuit.
Claim 3
Dependent Claim 46 words
A semiconductor memory device according to claim 1, wherein the film thickness of the gate oxide film of said switching transistor is equal to a film thickness of a gate oxide film of all transistors having a metal-oxide semiconductor structure and located in a peripheral circuit.
Claim 4
Dependent Claim 84 words
A semiconductor memory device according to claim 1, wherein the film thickness of the gate oxide film of said switching transistor is equal to a film thickness of a gate oxide of a part of transistors having a metal-oxide semiconductor structure locating in a peripheral circuit, and the film thickness of the gate oxide film of said driving transistor is equal to a film thickness of a gate oxide of the rest of transistors having the metal-oxide semiconductor structure locating in a peripheral circuit.
Claim 5
Dependent Claim 79 words
A semiconductor memory device according to any one of claim 1 to 4, wherein the film thickness of the gate oxide film of said switching transistor and the film thickness of the gate oxide film of said driving transistor are in the following relationship in which the film thickness of a gate oxide film of said driving transistor : the film thickness of the gate oxide film of said switching transistor = 10 : 11 to 10 : 20.
Claim 6
Dependent Claim 79 words
A semiconductor memory device according to any one of claim 1 to 4, wherein the film thickness of the gate oxide film of said switching transistor and the film thickness of the gate oxide film of said driving transistor are in the following relationship in which the film thickness of a gate oxide film of said driving transistor : the film thickness of the gate oxide film of said switching transistor = 10 : 12 to 10 : 15.
Claim 7
Dependent Claim 129 words
In a semiconductor memory device comprising: a memory cell including a pair of inverters, each of said inverters having a load member and a driving transistor connected in series, an output of one inverter being connected to an input of the other inverter and an output of the other inverter being connected to an input of one inverter, and storage nodes respectively constituted by junction points in said pair of inverters; and switching transistors each connected between corresponding one of the storage nodes and a bit line, said each switching transistor having a gate connected to a word line; the improvement in which: a permittivity of a gate oxide film of said driving transistor is larger than a dielectric constant of a gate oxide film of said switching transistor.

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