EP0521709A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Power converting device with inverter circuitry for driving multiple-phase variable-speed motor
Assignee: Toshiba Corp
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Filing: 1992-07-01
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Granted: —
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Expires: 2012-07-01
Abstract
Abstract A power conversion device (10) of the inverter type for three-phase DC motor (12) includes three parallel pairs of output transistors (Q1 to Q6) between a power supply voltage (20) and the ground potential (22). These pairs provide three upper-stage transistors (Q1, Q3, Q5) and three lower-stage transistors (Q2, Q4, Q6) with diodes (D1 to D6) being coupled thereto. Drivers (24) are connected to the transistors (Q) respectively. A capacitor (C1) for each upper-stage driver (24-1) has an electrode coupled to the power supply voltage and the other electrode coupled to the ground through a corresponding lower-stage transistor (Q2). A controller (30) controls the upper- and lower-stage drivers (24) in response to a pulse width modulation (PWM) signal (Sp) generated by a PWM generator (32) to represent a desired motor rotation speed. The upper-stage transistors (Q1, Q3, Q5) are PWM-driven so that each one turns on and off repeatedly during a 120-degree electrical angle period. While one upper-stage transistor (Q1) is PWM-driven during a 120-degree period, a corresponding lower-stage transistor (Q2) turns on in response to a reverse-phased pulse at the beginning of this period, thereby charging the capacitor (C1).
Inventors
- 👤 Yoshihiro c/o Intellectual Property D. Yamaguchi
- 👤 Yoshiyuki c/o Intellectual Property D. Sano
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 14:14
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/538; H02M7/53803; H02P; H02P6/00; H02P6/08; H02P6/085; H03; H03K; H03K2217/00; H03K2217/0081
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
243 words
An electric power conversion device for supplying a load with a continuously variable current, said device comprising an output section of bridge circuitry adapted to be coupled to the load, said output section including a series circuit of a first switch device (Q1, D1) and a second switch device (Q2, D2), first drive means (24-1) connected to said first switch device, for electrically driving the same, said first drive means having a charge storage device (C1) coupled to said first drive means to be charged when said second switch device turns on, and second drive means (24-2) connected to said second switch device, for electrically driving said second switch device, characterized in that said device further comprises control means (30, 32) connected to the first and second drive means, for (i) causing, during a designated period (T1), said first drive means to supply said first switch device with a pulse signal (Ss1) which is modulated in pulse width at a desired index of pulse width modulation to drive said first switch device (Q1, D1) in a pulse width modulation control manner, thereby to provide said load with a suitable current corresponding to the index of pulse width modulation, and for (ii) providing said second switch device (Q2, D2) with at least one pulse (P1) which is reverse in phase to said pulse signal (Ss1) to force said second switch device to turn on during the period (T1), thereby charging said charge storage device.
Claim 2
Dependent Claim
57 words
The device according to claim 1, characterized in that said control means comprises signal generation means (32) for receiving an electrical signal (Sc) indicative of a desired amount of current to be supplied to said load, and for generating a pulse width modulated signal (Sp) having a series of pulses which are changed in pulse width accordingly.
Claim 3
Dependent Claim
30 words
The device according to claim 2, characterized in that said first and second switch devices comprise charge-transfer actuable devices including transistors (Q1, Q2), and current-rectifying devices including diodes (D1, D2).
Claim 4
Dependent Claim
18 words
The device according to claim 3, characterized in that said transistors include insulated gate bipolar transistors (Q1, Q2).
Claim 5
Dependent Claim
23 words
The device according to claim 2, characterized in that said control means comprises a microprocessor (30) responsive to said signal generation means (32).
Claim 6
Dependent Claim
27 words
The device according to claim 5, characterized in that said microprocessor (30) causes said pulse signal (Ss1) to be synchronous with said pulse width modulated signal (Sp).
Claim 7
Dependent Claim
17 words
The device according to claim 6, characterized in that said load includes a direct current motor (12).
Claim 8
Dependent Claim
420 words
An inverter circuit for controlling a motor (12) in variable speed, comprising a plurality of pairs of output transistors (Q1 to Q6) connected to said motor and each having first and second current carrying electrodes and a control electrode, said pairs of output transistors being connected in parallel with one another between a power supply voltage (20) and a ground potential (22) and coupled to said motor at intermediate nodes thereof thereby providing upper-stage transistors (Q1, Q3, Q5) having first current carrying electrodes connected to said power supply voltage and lower-stage transistors (Q2, Q4, Q6) having second current carrying electrodes connected to said ground potential, diodes (D1 to D6) coupled to said output transistors (Q1 to Q6), first drivers (24-1, 24-3, 24-5) connected to the control electrodes of said upper-stage transistors, each (24-1) of said drivers having a capacitive element (CI) having an electrode coupled to said power supply voltage and another electrode coupled to said ground potential through one lower-stage transistor (Q2) series-connected to a corresponding upper-stage transistor (Q1) associated therewith, second drivers (24-2, 24-4, 24-6) connected to the control electrodes of said lower-stage transistors, and signal generator means (32) for providing a pulse width modulation or PWM signal (Sp) having a series of pulses which are modified in pulse width to represent a desired rotation speed of said motor, characterized in that said inverter circuit further comprises controller means (30) connected to said first drivers, said second drivers and said signal generator means, for (i) causing, during a selected period (T1), a selected one (24-1) of said first drivers which is associated with a selected upper-stage transistor (Q1) to supply said selected upper-stage transistor (Q1) with a pulse drive signal (Ss1) in synchronism with said pulse width modulation signal (Sp) so that said selected upper-stage transistor (Q1) repeats turn on and off operations, (ii) for, during a different period, causing a selected one of said second drivers which is connected to a certain lower-stage transistor (Q2) which forms a pair with said selected upper-stage transistor (Q1) to supply said certain lower-stage transistor (Q2) with a constant turn-on voltage, thereby charging a specific capacitive element (C1) coupled to said selected one of said first drivers, and (iii) for providing, during said selected period (T1), said certain lower-stage transistor (Q2) with a turn-on pulse signal having one or a plurality of pulse components (P1 shown in FIGS. 2 and 3) which are reverse in phase to said pulse drive signal (Ss1), thereby to further charge said specific capacitive element (C1).
Claim 9
Dependent Claim
21 words
The circuit according to claim 8, characterized in that said upper-stage transistors and said lowerstage transistors include insulated gate bipolar transistors.
Claim 10
Dependent Claim
37 words
The circuit according to claim 9, characterized in that said controller means (30) includes a microprocessor which is integrated on a chip substrate together with said first drivers, said second drivers and said insulated gate bipolar transistors.
Claim 11
Dependent Claim
29 words
The circuit according to claim 10, characterized by further comprising a level shift circuit (46) arranged between each of said first drivers (24-1, 24-3, 24-5) and said microprocessor (30).
Claim 12
Dependent Claim
46 words
The circuit according to claim 11, characterized by further comprising a resistive element (R) for current detection connected between the second current carrying electrodes of said lower-stage transistors (Q2, Q4, Q6) and said ground potential (22), said microprocessor (30) being responsive to said resistive element (R).
Claim 13
Dependent Claim
35 words
The circuit according to claim 12, characterized in that said signal generator means (32) has an input terminal (34) for externally receiving a signal (Sc) indicative of a desired rotation speed of said motor (12).
Claim 14
Dependent Claim
19 words
The circuit according to claim 13, characterized in that said motor includes a multiple-phase brushless direct current motor (12).
References Cited (Backward Citations)
No citation records indexed.
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