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EP0518037A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Bus arbitration system

Assignee: Escom AG
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Filing: 1992-04-25
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Granted: —
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Expires: 2012-04-25
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Abstract

Abstract A bus arbitration system (10) is capable of granting access to an expansion bus to devices following two-wire bus arbitration protocol or a three-wire bus arbitration protocol. The bus arbitration system (10) receives a plurality of bus request signals from a plurality of devices. Each bus request signal is made up of one or more coded pulses and has a predetermined priority. A priority encoder (148) receives the bus request signal and assigns a priority level to each bus request signal. An arbiter (78) determines and stores in memory which bus request signal has a highest priority and whether the device follows two-wire bus arbitration protocol or a three-wire bus arbitration protocol. The expansion bus R(31:0) grants access to the bus to the device having the highest priority once a previous device if any, has relinquished the bus.

Inventors

  • 👤 David Bruce Haynie

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 22:23
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F13/362; G06F2213/00; G06F2213/36; G06F2213/3602

Claims Analysis

Total Claims: 29
Claim 1
Independent Claim 230 words
A bus arbitration system capable of granting access to an expansion bus to devices following two-wire bus arbitration protocol or three-wire bus arbitration protocol comprising: means for receiving a plurality of bus request signals from a plurality of devices, each said bus request signal being made up of one or more coded pulses and having a predetermined priority, each said bus request signal being used to request access to the expansion bus; a prioritizer, said prioritizer receiving said bus request signal and assigning a priority level to each said bus request signal; arbiter means for determining and storing in memory which said bus request signal has the highest priority and whether said highest priority device is a device following two-wire bus arbitration protocol or a three-wire bus arbitration protocol; and bus granting means for granting access to the expansion bus to the device having the highest priority after a previous device, if any, has relinquished the bus, whereby said arbiter means transmits from its memory to said bus granting means whether said device having the highest priority is a device following two-wire bus arbitration protocol or a three-wire bus arbitration protocol, said bus granting means further including interfacing means for following two-wire bus arbitration protocol if said device follows two-wire bus arbitration protocol or said interfacing means following three-wire bus arbitration protocol if the device follows three-wire bus arbitration protocol.
Claim 2
Dependent Claim 33 words
A bus arbitration system according to claim 1, wherein said prioritizer further includes assigning means for assigning devices following two-wire bus arbitration protocol a higher priority than devices following three-wire bus arbitration protocol.
Claim 3
Dependent Claim 43 words
A bus arbitration system according to claim 1, further including snooper logic means for determining whether said previous device is currently accessing the bus, said snooper means delaying said highest priority device from accessing the bus until the previous device relinquishes the bus.
Claim 4
Dependent Claim 33 words
A bus arbitration system according to claim 1, further comprising bus contention detecting means for detecting if more than one device is accessing the expansion bus, and if so, signalling an error condition.
Claim 5
Dependent Claim 30 words
A bus arbitration according to claim 1, further comprising selection means for selecting out those devices following two-wire bus arbitration protocol from those devices which follow three-wire bus arbitration protocol.
Claim 6
Dependent Claim 37 words
A bus arbitration system according to claim 1, further comprising buffered direction means for determining the direction of data flow on the expansion bus according to an instruction received by the device currently accessing the expansion bus.
Claim 7
Dependent Claim 21 words
A bus arbitration system according to claim 1, wherein said device following two-wire bus arbitration protocol is a 32 bit device.
Claim 8
Dependent Claim 21 words
A bus arbitration system according to claim 1, wherein said device following three-wire bus arbitration protocol is a 16 bit device.
Claim 9
Dependent Claim 30 words
A bus arbitration system according to claim 1, further comprising multiple transfer means for allowing a device to transfer extended cycles across the expansion bus comprising multiple 32 bit cycles.
Claim 10
Dependent Claim 42 words
A bus arbitration system according to claim 1, further comprising means for asserting a full cycle strobe, said asserting means being activated when a device following two-wire bus arbitration protocol is accessing the expansion bus and initiates a read or write cycle.
Claim 11
Dependent Claim 168 words
A bus arbitration system capable of granting access to an expansion bus to devices following two-wire bus arbitration protocol or three-wire bus arbitration protocol comprising: means for receiving a plurality of bus request signals from a plurality of devices, each said bus request signal being made up of one or more coded pulses and having a predetermined priority, each said bus request signal being used to request access to the expansion bus; selection means for selecting out those devices following two-wire bus arbitration protocol from those devices which follow three-wire bus arbitration protocol; a prioritizer, said prioritizer receiving said bus request signal and assigning a priority level to each said bus request signal; bus granting means for granting access to the expansion bus to the device having the highest priority after a previous device, if any, has relinquished the bus; and buffer direction means for determining the direction of data flow on the expansion bus according to an instruction received by the device currently accessing the expansion bus.
Claim 12
Dependent Claim 33 words
A bus arbitration system according to claim 11, wherein said prioritizer further includes assigning means for assigning devices following two-wire bus arbitration protocol a higher priority than devices following three-wire bus arbitration protocol.
Claim 13
Dependent Claim 33 words
A bus arbitration system according to claim 11, further comprising bus contention detecting means for detecting if more than one device is accessing the expansion bus, and if so, signalling an error condition.
Claim 14
Dependent Claim 21 words
A bus arbitration system according to claim 11, wherein said device following two-wire bus arbitration protocol is a 32 bit device.
Claim 15
Dependent Claim 21 words
A bus arbitration system according to claim 11, wherein said device following three-wire bus arbitration protocol is a 16 bit device.
Claim 16
Dependent Claim 30 words
A bus arbitration system according to claim 11, wherein said two-wire bus arbitration protocol devices and said three-wire bus arbitration protocol devices further includes interrupt generating means for generating interrupts.
Claim 17
Dependent Claim 42 words
A bus arbitration system according to claim 16, wherein said expansion bus further includes polling means for transmitting a polling inquiry after the receipt of an interrupt transmitted from said two-wire bus arbitration protocol device or said three-wire bus arbitration protocol device.
Claim 18
Dependent Claim 39 words
A bus arbitration system according to claim 17, wherein said two-wire bus arbitration protocol device or said three-wire bus arbitration protocol device further includes asserting means for asserting an interrupt response to the polling inquiry by said expansion bus.
Claim 19
Dependent Claim 41 words
A bus arbitration system according to claim 17, wherein said two-wire bus arbitration protocol device or said three-wire bus arbitration protocol device further including vector asserting means for asserting a vector in response to the polling inquiry of said expansion bus.
Claim 20
Dependent Claim 42 words
A bus arbitration system according to claim 19, wherein said expansion bus further includes terminating means for terminating the interrupt if no two-wire bus arbitration protocol device or three-wire bus arbitration protocol device responds to the polling inquiry of said expansion bus.
Claim 21
Dependent Claim 164 words
A bus arbitration system capable of granting access to an expansion bus to devices following two-wire bus arbitration protocol comprising: means for receiving a plurality of a synchronous bus request signals from a plurality of devices, each said bus request signal being made up of one or more coded pulses and having a predetermined priority, each said bus request signal being used to request access to the expansion bus; a prioritizer, said prioritizer receiving said bus request signal and assigning a priority level to each said bus request signal; arbiter means for determining and storing in memory which said bus request signal has the highest priority; and bus granting means for granting access to the expansion bus to the device having the highest priority after a previous device, if any, has relinquished the bus, whereby said expansion bus asserts a full-cycle strobe which when activated allows the two-wire bus arbitration protocol device to access the expansion bus and initiate a read or write cycle.
Claim 22
Dependent Claim 24 words
A bus arbitration system according to claim 21, further including accessing means for allowing three-wire bus arbitration protocol devices to access the expansion bus.
Claim 23
Dependent Claim 34 words
A bus arbitration protocol device according to claim 22, wherein said prioritizer further includes assigning means for assigning devices following two-wire bus arbitration protocol a higher priority than devices following three-wire bus arbitration protocol.
Claim 24
Dependent Claim 48 words
A bus arbitration system according to claim 23, wherein said bus granting means further includes interfacing means for following two-wire bus arbitration protocol if said device follows two-wire bus arbitration protocol or said interfacing means following three-wire bus arbitration protocol if the device follows three-wire bus arbitration protocol.
Claim 25
Dependent Claim 43 words
A bus arbitration system according to claim 21, further including snooper logic means for determining whether said previous device is currently accessing the bus, said snooper means delaying said highest priority device from accessing the bus until the previous device relinquishes the bus.
Claim 26
Dependent Claim 33 words
A bus arbitration system according to claim 21, further comprising bus contention detecting means for detecting if more than one device is accessing the expansion bus, and if so, signalling an error condition.
Claim 27
Dependent Claim 30 words
A bus arbitration system according to claim 24, further comprising selection means for selecting out those devices following two-wire bus arbitration protocol from those devices following three-wire bus arbitration protocol.
Claim 28
Dependent Claim 21 words
A bus arbitration system according to claim 24, wherein said device following two-wire bus arbitration protocol is a 32 bit device.
Claim 29
Dependent Claim 21 words
A bus arbitration system according to claim 24, wherein said device following three-wire bus arbitration protocol is a 16 bit device.

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