Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
255 words
A video signal gradation corrector comprising a histogram memory for storing a luminance histogram of a video luminance signal, a histogram operating circuit (3) for receiving an output signal of said histogram memory to extract a feature of the luminance histogram from the received data, a limiter/adder circuit connected to the output side of said histogram operating circuit for processing the data of said histogram memory, an accumulation control register circuit (6) and a normalization control register circuit each connected to the output side of said histogram operating circuit, a histogram accumulation adding circuit (8) for receiving an output signal of said histogram memory and an output signal of said accumulation control register circuit to make a cumulative addition of processed data of said histogram memory, a cumulative histogram memory for storing the result of cumulative addition, a look-up table operating circuit for receiving an output signal of said cumulative histogram memory and an output signal of said normalization control register circuit to normalize data of said cumulative histogram memory, and a look-up table memory for storing the result of operation performed by said look-up table operating circuit, in which said histogram operating circuit (3) includes a constant (100, 110), a circuit (99) for detecting an average luminance level of an input luminance signal, an operator (101, 111) for performing an operation on the detected average luminance level using said constant, and a limiter circuit (103, 113) for limiting the lower limit value or the upper limit value of an output signal of said operator.
Claim 2
Dependent Claim
54 words
A video signal gradation corrector according to Claim 1, wherein said histogram operating circuit (3) includes a subtractor (101) for subtracting said constant (100) from the detected average luminance level and a lower-limit limiter circuit (103) for limiting an output signal of said subtractor to a signal having a value not smaller than 0.
Claim 3
Dependent Claim
52 words
A video signal gradation corrector according to Claim 1 or 2, wherein said histogram operating circuit (3) includes an adder (111) for adding the detected average luminance level and said constant (110) and an upper-limit limiter circuit (113) for limiting an output signal of said adder to a certain upper limit value.
Claim 4
Dependent Claim
71 words
A video signal gradation corrector according to any preceding Claim, wherein said histogram operating circuit (3) includes a subtractor (101) for subtracting said constant (100) from the detected average luminance level, a constant-multiplication circuit (102) for multiplying an output signal of said subtractor by a constant, and a lower-limit limiter circuit (103) for limiting an output signal of said constant-multiplication circuit to a signal having a value not smaller than 0.
Claim 5
Dependent Claim
67 words
A video signal gradation corrector according to any preceding Claim, wherein said histogram operating circuit (3) includes an adder (111) for adding the detected average luminance level and said constant (110), a constant-multiplication circuit (112) for multiplying an output signal of said adder by a constant, and an upper-limit limiter circuit (113) for limiting an output signal of said constant-multiplication circuit to a certain upper limit value.
Claim 6
Dependent Claim
262 words
A video signal gradation corrector comprising a histogram memory (202) for storing a luminance histogram of a video luminance signal, a histogram operating circuit (208) for receiving an output signal of said histogram memory to extract a feature of the luminance histogram from the received data, a limiter/adder circuit (205) connected to the output side of said histogram operating circuit for processing the data of said histogram memory, an accumulation control register circuit (206) and a normalization control register circuit (207) each connected to the output side of said histogram operating circuit, a histogram accumulation adding circuit (208) for receiving an output signal of said histogram memory and an output signal of said accumulation control register circuit to make a cumulative addition of processed data of said histogram memory, a cumulative histogram memory (209) for storing the result of cumulative addition, a look-up table operating circuit (210) for receiving an output signal of said cumulative histogram memory and an output signal of said normalization control register circuit to normalize data of said cumulative histogram memory, a subtractor (231) which is connected to the output side of said look-up table operating circuit and by which from an output signal successively provided from said look-up table operating circuit is subtracted an address of said cumulative histogram memory at that time, a look-up table memory (211) for storing the result of subtraction, an adder (232) for adding an output signal of said look-up table memory and the video luminance signal inputted, and a timing control circuit (212) for controlling the operations of the above-mentioned circuits.