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EP0511614A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Synchronization control circuit for TDMA cellular communication system

Assignee: NEC Corp
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Filing: 1992-04-27
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Granted: —
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Expires: 2012-04-27
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Abstract

Abstract A synchronization control circuit applicable to a TDMA (Time Division Multiple Access) digital mobile communication system for controlling the transmission and reception time base of a mobile station on which the circuit is mounted. The synchronization control circuit includes a plurality of time base counter circuits each counting down standard clock pulses to generate a plurality of timing pulse sequences having time bases which are respectively associated with the cells of the system. All the time base counter circuits share a single counter controller which controls the writing and reading of counts out of the time base counter circuits. The counter controller selectively produces the outputs of one of the time base counter circuits as a timing pulse sequence. The synchronization control circuit, therefore, is small size and light weight and saves power.

Inventors

  • 👤 Kenji c/o NEC Corporation Nakahara
  • 👤 Hiroyuki C/O Nec Engineering Ltd. Kaneda

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-04 17:31
CPC Classifications
H; H04; H04W; H04W56/00; H04W56/001; H04W92/00; H04W92/04; H04W92/10; Y; Y02; Y02D; Y02D30/00; Y02D30/70

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 200 words
A synchronization control circuit for controlling a time base of a transmitter/receiver mounted on a mobile station which is included in a TDMA (Time Division Multiple Access) cellular digital mobile communication system for selectively interchanging digital signals with a number of mobile stations located in cells each being defined by one of a plurality of base stations which share a plurality of radio frequency carries different in frequency and time base from one another on a time division basis, said circuit comprising; a plurality of time base counter circuits each being assigned to respective one of said plurality of carrier waves for generating various timing signals necessary for said transmitter/receiver in response to clock pulses which are generated by a clock pulse source built in said transmitter/receiver; a control signal source for generating counter circuit control signals for causing each of said plurality of time base counter circuits to start counting, stop counting, or reading counts thereof; and single counter controller means shared by said plurality of time base counter circuits and responsive to said control signals for selectively producing count outputs of one of said plurality of time base counter circuits as a time base signal of said transmitter/receiver.
Claim 2
Dependent Claim 93 words
A circuit as claimed in claim 1, wherein said single counter controller means comprises: temporary storage means for temporarily storing write information and read information meant for counters included in any one of said time base counter circuits and associated with said control signals; a first counter selector responsive to said control signals for selectively enabling the write information to be written from said temporary storage means to said counters; and a second counter selector for transferring the outputs of one of said time base counter circuits selected to said temporary storage means.

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