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EP0508619A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Bi-directional socket stimulus interface for a logic simulator

Assignee: HP Inc
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Filing: 1992-03-18
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Granted: —
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Expires: 2012-03-18
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Abstract

Abstract A communications socket (FIG. 4) between a logic simulator (202) and a system (206) for generating input stimuli based on the current state of the logic simulator (202) is provided. Input stimuli to the logic simulator (202) for use in implementing a particular circuit design simulation are calculated by interfacing an input program which models the function of the circuit being designed with the logic simulator (202). The lines in this input program are converted by an adaptive vector generator (206) into communications signals which are understandable by the logic simulator (202) so that the desired simulation may take place. The input program thus enables the adaptive vector generator (206) to behaviorally model complex logical systems that the logic simulator model is only a part of and allows for more accurate and detailed simulation. The adaptive vector generator (206) does this by determining the next input vector state in accordance with the present state of the logic simulator model as received from the communications socket. In other words, based on the state data received from the logic simulator (202), the adaptive vector generation (206) automatically calculates the next stimulus pattern for the logic simulator (202) model and provides this stimuli to the logic simulator (202) through the communications socket. This technique removes the tediousness of the prior art techniques in that the design engineer no longer needs to specify every input step and to anticipate the output state of the circuit.

Inventors

  • 👤 Craig Heikes

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 00:59
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F30/00; G06F30/30; G06F30/32; G06F30/33

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 127 words
A bidirectional stimulus interface (FIG. 4) for a logic simulator (202) responsive to input stimuli to perform a logic simulation which gives the logic values of nodes of a circuit, comprising: adaptive means (206) for determining, based on simulated logic values (204) of nodes of said circuit, input vectors representing the next input stimuli for setting logic values of said nodes of said circuit; and means (FIG. 4) for providing bidirectional communication between said logic simulator (202) and said adaptive means (206) so as to provide said input stimuli to said logic simulator (202) for a simulation and to provide the simulated logic values of said nodes of said circuit to said adaptive means (206) for use thereby in determining input vectors representing the next input stimuli.
Claim 2
Independent Claim 149 words
A system for verifying the logical function of a circuit, comprising: a logic simulator (202) responsive to input stimuli so as to perform a logic simulation which gives the logic values of nodes of said circuit in response to said input stimuli; adaptive means (206) for determining, based on simulated logic values (204) of nodes of said circuit received from said logic simulator (202), input vectors representing the next input stimuli to said logic simulator (202) for setting logic values of said nodes of said circuit; and means (FIG. 4) for providing bidirectional communication between said logic simulator (202) and said adaptive means (206) so as to provide said input stimuli to said logic simulator (202) for a simulation and to provide the simulated logic values of said nodes of said circuit to said adaptive means (206) for use thereby in determining input vectors representing the next input stimuli.
Claim 3
Dependent Claim 68 words
The system of claim 1 or 2, further comprising means for providing a program (FIG. 6(b)) to said adaptive means (206), said program (FIG. 6(b)) including state based equations which are processed by said adaptive means (206) to determine input vectors representing the next input stimuli from the simulated logic values of said nodes of said circuit resulting from application of the current input stimuli to said circuit.
Claim 4
Independent Claim 142 words
The system of claims 3, wherein said adaptive means includes processing means for performing the steps of: determining (302) the next action requested by said program; reading (306) from said bidirectional communication means the current state of said logic simulator (202); calculating (308) said input vectors representing the next input stimuli from the current state of said logic simulator (202); applying (308) said input vectors representing the next input stimuli to said logic simulator (202) via said bidirectional communication means; advancing (310) said logic simulator (202) to its next state; reading (312) from said bidirectional communication means the simulated logic values of said nodes of said circuit; determining (314) if the read simulated logic values of said nodes of said circuit are correct; and providing an indication (Failure) to a user of said logic simulator (202) whether said logic values are correct.
Claim 5
Dependent Claim 64 words
The system of claim 1 or 2, wherein said adaptive means (206) comprises a program (FIG. 6(b)) including state based equations unique to said circuit which are processed by said adaptive means (206) to determine input vectors representing the next input stimuli from the simulated logic values of said nodes of said circuit resulting from application of the current input stimuli to said circuit.
Claim 6
Dependent Claim 17 words
The system of claim 1 or 2, wherein said logic simulator (202) is a switch-level logic simulator.
Claim 7
Dependent Claim 73 words
An automated method of verifying the logical function of a circuit using a logic simulator (202) which is responsive to input stimuli to perform a logic simulation which gives the logic values of nodes of said circuit, comprising the steps of: reading (FIG. 6(b)) (306) the current state of said logic simulator; and calculating (FIG. 6(b)) (308) the input vectors representing the next input stimuli from the current state of said logic simulator.
Claim 8
Dependent Claim 91 words
The method of claim 7, comprising the further steps of: applying (308) said input vectors representing the next input stimuli to said logic simulator (202); advancing (310) said logic simulator (202) to its next state; reading (312) the simulated logic values of said nodes of said circuit for said next state of said logic simulator (202); determining (314) if the read simulated logic values of said nodes of said circuit are correct; and providing an indication (Failure) to a user of said logic simulator (202) whether said logic values are correct.

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