EP0507270A1
Expired / Lapsed
EP
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DMD architecture and timing for use in a pulse-width modulated display system
Assignee: Texas Instruments Inc
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Filing: 1992-04-01
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Granted: —
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Expires: 2012-04-01
Abstract
Abstract It is possible to replace a standard display unit in a television with spatial light modulator circuitry (26) to improve the resolution seen by the viewer (40). The invention herein provides a system architecture, individual parts of the system (28,32,36) and techniques for minimizing the burst data rate while maintaining a reasonable system speed. The resultant system (26) provides better resolution with a manageable data rate and bandwidth.
Inventors
- 👤 Paul M. Urbanus
- 👤 Jeffrey B. Sampsell
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 06:39
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/2092; G02; G02F; G02F2/00; G09G3/34; G09G3/3433; G09G3/346; G09G5/00; G09G5/36; G09G5/39; G09G5/393; G09G5/395; G09G5/399; H; H04; H04N; H04N3/00; H04N3/02; H04N3/08; H04N3/10; H04N3/12; H04N3/127; H04N5/00; H04N5/74; H04N5/7416; H04N5/7458; H04N9/00; H04N9/12; H04N9/30; G09G2310/00; G09G2310/02; G09G2310/0202; G09G2310/0205; G09G2310/06; G09G2310/061; G09G2352/00; G09G2360/00; G09G2360/18; G09G3/2007; G09G3/2018; G09G3/2022; G09G3/2037; H04N2005/7466
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
89 words
A display system comprising: a) a receiver capable of receiving a standardized composite audio and video signal; b) a tuner for isolating the video component; c) a decimation processor for converting said video component into a set of signals for use with a spatial light modulator unit; d) a memory storage unit for storing said signals; e) a light source; f) a spatial light modulator array controlled by said stored signals that modulates light from said light source to produce an image; and g) optics to project said image.
Claim 2
Dependent Claim
45 words
An integrated circuit device comprising; a) an array of spatial light modulator elements divided into subarrays; b) an array of decoders, at least one for every one of said subarray; c) an array of input registers, at least one for every one of said subarrays.
Claim 3
Dependent Claim
40 words
The device of claim 2 wherein each of said subarrays is divided into blocks, said blocks selected by lines input through said decoder array, and said blocks cleared by lines through said input registers, said input registers being shift registers.
Claim 4
Dependent Claim
44 words
The device of claim 2 wherein said input register array is an array of demultiplexers, at least one demultiplexer per said subarray, said demultiplexers electrically connected to an array of first-in-first-out buffers, which are in turn electrically connected to a second array of demultiplexers.
Claim 5
Dependent Claim
22 words
The device of claim 4 wherein each of said subarrays is reset by an electrical signal independent of other of said subarrays.
Claim 6
Dependent Claim
70 words
A memory unit comprising; a) a decimation processor; b) at least one input buffer electrically connected to a decimation processor; c) a controlled bus line out of said buffer; d) at least one input shift register; e) at least one array of memory cells; f) at least one output shift register; and g) a controlled bus line electrically connected between said output shift registers and a spatial light modulator circuit.
Claim 7
Dependent Claim
68 words
The unit of claim 6 wherein there is an array of said input buffers, each of said buffers electrically connected via a switchable bus to at least two of said input registers, said input registers each electrically connected to said corner-turning memories, each of said corner turning memories electrically connected to said output buffers, said buffers electrically connected via a switchable bus to said spatial light modulator circuit.
Claim 8
Dependent Claim
69 words
The unit of claim 6 wherein an array of said input buffers are all electrically connected via a bus to one of said input shift registers, the output of said buffers being place on the bus in sequence by color, said input shift register electrically connected to a corner turning memory, said corner turning memory outputting a sequence of color blocks of data to a spatial light modulator circuit.
Claim 9
Independent Claim
35 words
A method of displaying data comprising addressing and loading the contents of memory cells onto display pixels so that each bit level of significance is displayed for the appropriate portion of the total frame time.
Claim 10
Independent Claim
31 words
A method of displaying data comprising addressing and loading the contents of memory cells onto display pixels so that all bits of a designated significance level are loaded and displayed simultaneously.
Claim 11
Dependent Claim
25 words
The method of claim 10 wherein a constant data value is loaded onto said pixels when the contents of said memory cells is not unique.
Claim 12
Dependent Claim
21 words
The method of claim 10 where said addressing step includes the use of decoders to address rows of said cells simultaneously.
Claim 13
Dependent Claim
29 words
The method of claim 10 wherein said addressing step includes the use of decoder to address rows of said cells simultaneously and to address groups of said rows simultaneously.
References Cited (Backward Citations)
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