EP0507208A2
Expired / Lapsed
EP
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A data processing system with combined static and dynamic masking of information in an operand
Assignee: Motorola Solutions Inc
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Filing: 1992-03-26
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Granted: —
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Expires: 2012-03-26
Abstract
Abstract A data processing system (10) implements a combined static and a dynamic masking operation of a breakpoint address. A static mask implements a conditional mask of a predetermined number of bits specified by the user and is determined prior to a comparison operation between the breakpoint address stored in a breakpoint register (24) and a logical address transferred via a logical address bus (11). A dynamic mask value implements a variable mask which allows the data processing system to mask the breakpoint address according to the size of a breakpoint address access. The static mask value and the dynamic mask value are combined using the same circuitry to form a combined mask value (19). Breakpoint function and address translation are implemented in the system (10) by using the same drive and control circuitry (20, 44, 48) to accomplish both functions. The breakpoint register (24) is implemented as an entry in a CAM array (26).
Inventors
- 👤 William C. Moyer
- 👤 Joseph A. Gutierrez
- 👤 Yui Kaye Ho
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-25 12:23
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/30018; G06F9/30036; G06F9/30038
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
157 words
A data processing system (10) with combined static and dynamic masking of information in an operand, comprising: a processing unit (12) for providing the operand in response to instruction execution and providing a first (15) control signal, the first control signal having static mask information defined prior to the instruction execution; wherein the system (10) is characterized by: the processing unit (12) providing a second (17) control signal, the second control signal having dynamic mask information derived from a first portion of the operand, the static and dynamic mask information collectively defining a second portion of the operand which is utilized to implement a subsequent function performed by the data processing system (10); and logic means (16,18) coupled to the processing unit (10) for receiving the first and second control signals, the logic means (16,18) providing a combined mask signal which combines the static and dynamic mask information to concurrently define the second portion of the operand.
Claim 2
Dependent Claim
45 words
The data processing system (10) of claim 1 further comprising: second logic means (20) for receiving the operand and the combined mask signal, the second logic means selectively identifying a third portion of the operand to mask to form the second portion of the operand.
Claim 3
Dependent Claim
43 words
The data processing system (10) of claim 1 further comprising: decoding means (14) having an input for receiving the first portion of the operand and providing the second control signal as a decoded size control signal determining a size of the second portion.
Claim 4
Dependent Claim
23 words
The data processing system (10) of claim 1 wherein the subsequent function performed by the data processing system (10) is a breakpoint operation.
Claim 5
Dependent Claim
146 words
In a data processing system (10), a method of implementing combined static and dynamic masking of information in an operand, comprising the steps of: providing the operand in response to instruction execution (12); providing a first (15) control signal, the first control signal having static mask information defined prior to the instruction execution; wherein the method is characterized by the steps of: providing a second control signal, the second control signal having dynamic mask information derived from a first portion of the operand, the static and dynamic mask information collectively defining a second portion of the operand which is utilized to implement a subsequent function performed by the data processing system; and using the first and second control signals to provide a combined mask signal, the combined mask signal combining the static and dynamic mask information to concurrently define the second portion of the operand (16,18).
Claim 6
Dependent Claim
22 words
The method of implementing combined static and dynamic masking of information of claim 5 wherein the subsequent function is a breakpoint operation.
Claim 7
Dependent Claim
40 words
The method of implementing combined static and dynamic masking of information of claim 5 further comprising the step of: providing the second control signal as a decoded size control signal determining a size of the second portion of the operand.
Claim 8
Dependent Claim
193 words
A data processing system (10) with combined static and dynamic masking of information in an address operand, comprising: a processing unit (12) for providing the address operand in response to instruction execution and providing a first (15) control signal, the first (15) control signal having static mask information defined prior to the instruction execution; wherein the system (10) is characterized by: the processing unit (12) providing a second (17) control signal having dynamic mask information derived from a first portion of the address operand, the static and dynamic mask information collectively defining a second portion of the address operand which is utilized to implement a subsequent function performed by the data processing system (10); a plurality of logic gates (16,18) coupled to the processing unit (12) for receiving the first and second control signals, the logic gates (16,18) providing a combined mask signal which combines the static and dynamic mask information to concurrently define the second portion of the address operand; and a plurality of driver circuits (20) for receiving the address operand and the combined mask signal, the plurality of driver circuits (20) selectively identifying a third portion of the address operand.
Claim 9
Dependent Claim
86 words
The data processing system (10) of claim 8 wherein each of the plurality of driver circuits (20) further comprises: an inverter (38) means having an input for receiving a predetermined bit of the address operand, and having an output; and a first logic gate (40) having a first input for receiving a predetermined bit of the combined mask signal, a second input coupled to the output of the inverter means, and an output for providing a predetermined bit of the second portion of the address operand.
Claim 10
Dependent Claim
69 words
The data processing system (10) of claim 9 wherein each of the plurality of driver circuits (20) further comprises: a second logic gate (42) having a first input for receiving the predetermined bit of the combined mask signal, a second input coupled to the predetermined bit of the address operand, and an output for providing a complement of the predetermined bit of the second portion of the address operand.
References Cited (Backward Citations)
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