Image display apparatus for displaying images of a plurality of kinds of video signals

Claim 2

The apparatus as claimed in Claim 1, wherein said first converting means comprises: a field memory for storing a video signal of one field; first judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on said display means, and generating a first judgment signal for representing the judgment result; and first control signal generating means for generating a first write control signal for controlling said field memory to write said inputted video signal therein and a first read control signal for controlling said field memory to read out said video signal therefrom in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the first write and read control signals to said field memory, said first control signal generating means delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field.

Claim 3

The apparatus as claimed in Claim 1, wherein said second converting means comprises: a field memory for storing a video signal of one field; delay means for delaying said video signal outputted from said field memory by one scanning line; second control signal generating means for generating a second write control signal for controlling said field memory to write said inputted video signal therein and a second read control signal for controlling said field memory to read out said video signal therefrom so as to insert a video signal of one field having no data to said read video signal for a predetermined time interval in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the second write and read control signals to said field memory, the frequency of the second read control signal being set to be higher than that of the second write control signal depending on a ratio of the frequency of the read control signal to the frequency of the write control signal; first amplifying means for amplifying said video signal outputted from said field memory with a predetermined first amplification factor; second amplifying means for amplifying said video signal outputted from said delay means; and adding means for adding a video signal amplified by said first amplifying means and a video signal amplified by said second amplifying means so as to interpolating said video signal of one field having no data in the added video signal, and outputting the added video signal having the addition result.

Claim 4

The apparatus as claimed in Claim 1, wherein said first converting means comprises: a field memory for storing a video signal of one field; first judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on said display means, and generating a first judgment signal for representing the judgment result; and first control signal generating means for generating a first write control signal for controlling said field memory to write said inputted video signal therein and a first read control signal for controlling said field memory to read out said video signal therefrom in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the first write and read control signals to said field memory, said first control signal generating means delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, and said second converting means comprises: said field memory; delay means for delaying said video signal outputted from said field memory by one scanning line; second control signal generating means for generating a second write control signal for controlling said field memory to write said inputted video signal therein and a second read control signal for controlling said field memory to read out said video signal therefrom so as to insert a video signal of one field having no data to said read video signal for a predetermined time interval in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the second write and read control signals to said field memory, the frequency of the second read control signal being set to be higher than that of the second write control signal depending on a ratio of the frequency of the second read control signal to the frequency of the second write control signal; first amplifying means for amplifying said video signal outputted from said field memory with a predetermined first amplification factor; second amplifying means for amplifying said video signal outputted from said delay means; and adding means for adding a video signal amplified by said first amplifying means and a video signal amplified by said second amplifying means so as to interpolating said video signal of one field having no data in the added video signal, and outputting the added video signal having the addition result.

Claim 5

An image display apparatus comprising: first synchronizing signal generating means for reproducing and generating first vertical and horizontal synchronizing signals in response to an inputted video signal, said inputted video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines; second synchronizing signal generating means for generating second vertical and horizontal synchronizing signals for deflection of display in asynchronous with said vertical and horizontal synchronizing signals generated by said first synchronizing signal generating means; display means for displaying an image of an inputted video signal thereon with a predetermined field frequency and a predetermined number of scanning lines using said second vertical and horizontal synchronizing signals outputted from said second synchronizing signal generating means in response to said inputted video signal; first converting means for converting an inputted first video signal having a first field frequency lower than said predetermined field frequency and said predetermined number of scanning lines into an output second video signal having said predetermined field frequency and said predetermined number of scanning lines, using said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting said output second video signal to said display means; and second converting means for converting an inputted third video signal having a first number of scanning lines smaller than said predetermined number of scanning lines and said predetermined field frequency into an output fourth video signal having said predetermined field frequency and said predetermined number of scanning lines, using said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting said output fourth video signal to said display means.

Claim 6

The apparatus as claimed in Claim 5, wherein said first converting means comprises: first and second field memories each memory storing a video signal of one field; first judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on said display means, and generating a first judgment signal for representing the judgment result; first control signal generating means for generating a first write control signal for controlling said first and second field memories alternately by one field of said inputted video signal to write said inputted video signal therein and a first read control signal for controlling said first and field memories to read out said video signal therefrom in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the first write and read control signals to said first and second field memories, said first control signal generating means delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field; and timing correction means for delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, thereby preventing said first read control signal from being generated prior to said first write control signal, and preventing said first write control signal from being generated prior to said first read control signal.

Claim 7

The apparatus as claimed in Claim 5, wherein said second converting means comprises: first and second field memories each memory storing a video signal of one field; delay means for delaying said video signal outputted from said first and second field memories by one scanning line; second control signal generating means for generating a second write control signal for controlling said first and second field memories to write said inputted video signal therein and a second read control signal for controlling said first and second field memories to read out said video signal therefrom so as to insert a video signal of one field having no data to said read video signal for a predetermined time interval in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the second write and read control signals to said first and field memories, the frequency of the second read control signal being set to be higher than that of the second write control signal depending on a ratio of the frequency of the read control signal to the frequency of the write control signal; first amplifying means for amplifying said video signal outputted from said first and second memories with a predetermined first amplification factor; second amplifying means for amplifying said video signal outputted from said delay means; adding means for adding a video signal amplified by said first amplifying means and a video signal amplified by said second amplifying means so as to interpolating said video signal of one field having no data in the added video signal, and outputting the added video signal having the addition result; further judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on said display means, and generating a further judgment signal for representing the judgment result; and timing correction means for delaying said second read control signal by one scanning line when said further judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, thereby preventing said second read control signal from being generated prior to said second write control signal, and preventing said second write control signal from being generated prior to said second read control signal.

Claim 8

The apparatus as claimed in Claim 5, wherein said first converting means comprises: first and second field memories each memory storing a video signal of one field; first judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on said display means, and generating a first judgment signal for representing the judgment result; and first control signal generating means for generating a first write control signal for controlling said first and second field memories to write said inputted video signal therein and a first read control signal for controlling said first and second field memories to read out said video signal therefrom in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the first write and read control signals to said first and second field memories, said first control signal generating means delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, said second converting means comprises: said first and second field memories; delay means for delaying said video signal outputted from said first and second field memories by one scanning line; second control signal generating means for generating a second write control signal for controlling said first and second field memories to write said inputted video signal therein and a second read control signal for controlling said first and second field memories to read out said video signal therefrom so as to insert a video signal of one field having no data to said read video signal for a predetermined time interval in response to said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting the second write and read control signals to said first and second field memories, the frequency of the second read control signal being set to be higher than that of the second write control signal depending on a ratio of the frequency of the second read control signal to the frequency of the second write control signal; first amplifying means for amplifying said video signal outputted from said first and second memories with a predetermined first amplification factor; second amplifying means for amplifying said video signal outputted from said delay means; and adding means for adding a video signal amplified by said first amplifying means and a video signal amplified by said second amplifying means so as to interpolating said video signal of one field having no data in the added video signal, and outputting the added video signal having the addition result, said apparatus further comprises timing correction means for delaying said first and second read control signals by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, thereby preventing said first and second read control signal from being generated prior to said first and second write control signal, respectively, and preventing said first and second write control signal from being generated prior to said first and second read control signal, respectively.

Claim 9

A television set comprising: tuner means for respectively converting broadcast waves modulated according to a plurality of kinds of video signals into said plurality of kinds of video signals; switch means for selecting either one of said plurality of kinds of video signals and outputting the selected video signal; first synchronizing signal generating means for reproducing and generating first vertical and horizontal synchronizing signals in response to the selected video signal outputted from said switch means, said inputted video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines; second synchronizing signal generating means for generating second vertical and horizontal synchronizing signals for deflection of display in response to said vertical and horizontal synchronizing signals generated by said first synchronizing signal generating means; display means for displaying an image of an inputted video signal thereon with a predetermined field frequency and a predetermined number of scanning lines using said second vertical and horizontal synchronizing signals outputted from said second synchronizing signal generating means in response to said inputted video signal; first converting means for converting said selected video signal having a first field frequency lower than said predetermined field frequency and said predetermined number of scanning lines into an output second video signal having said predetermined field frequency and said predetermined number of scanning lines, using said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting said output second video signal to said display means; and second converting means for converting said selected inputted video signal having a first number of scanning lines smaller than said predetermined number of scanning lines and said predetermined field frequency into an output fourth video signal having said predetermined field frequency and said predetermined number of scanning lines, using said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting said output fourth video signal to said display means, wherein said switch means enables either one of said first and second converting means to operate depending on said selected video signal.

Claim 10

A television set comprising: tuner means for respectively converting broadcast waves modulated according to a plurality of kinds of video signals into said plurality of kinds of video signals; switch means for selecting either one of said plurality of kinds of video signals and outputting the selected video signal; first synchronizing signal generating means for reproducing and generating first vertical and horizontal synchronizing signals in response to the selected video signal outputted from said switch means, said inputted video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines; second synchronizing signal generating means for generating second vertical and horizontal synchronizing signals for deflection of display in asynchronous with said vertical and horizontal synchronizing signals generated by said first synchronizing signal generating means; display means for displaying an image of an inputted video signal thereon with a predetermined field frequency and a predetermined number of scanning lines using said second vertical and horizontal synchronizing signals outputted from said second synchronizing signal generating means in response to said inputted video signal; first converting means for converting said selected video signal having a first field frequency lower than said predetermined field frequency and said predetermined number of scanning lines into an output second video signal having said predetermined field frequency and said predetermined number of scanning lines, using said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting said output second video signal to said display means; and second converting means for converting said selected inputted video signal having a first number of scanning lines smaller than said predetermined number of scanning lines and said predetermined field frequency into an output fourth video signal having said predetermined field frequency and said predetermined number of scanning lines, using said first and second vertical and horizontal synchronizing signals generated by said first and second synchronizing signal generating means, and outputting said output fourth video signal to said display means, wherein said switch means enables either one of said first and second converting means to operate depending on said selected video signal.

Claim 11

A video signal converter apparatus comprising: first converting means for converting an inputted first video signal having a first field frequency lower than a predetermined field frequency and a predetermined number of scanning lines into an output second video signal having said predetermined field frequency and said predetermined number of scanning lines, using external first and second vertical and horizontal synchronizing signals, and outputting said output second video signal, said first input video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines, said first converting means comprising: a field memory for storing a video signal of one field; first judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on display means, and generating a first judgment signal for representing the judgment result; and first control signal generating means for generating a first write control signal for controlling said field memory to write said inputted first video signal therein and a first read control signal for controlling said field memory to read out said video signal therefrom in response to said external first and second vertical and horizontal synchronizing signals, and outputting the first write and read control signals to said field memory, said first control signal generating means delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field.

Claim 12

A video signal converter apparatus comprising: second converting means for converting an inputted third video signal having a first number of scanning lines smaller than a predetermined number of scanning lines and a predetermined field frequency into an output fourth video signal having said predetermined field frequency and said predetermined number of scanning lines, using external first and second vertical and horizontal synchronizing signals, and outputting said output fourth video signal, said inputted third video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines; said second converting means comprising: a field memory for storing a video signal of one field; delay means for delaying said video signal outputted from said field memory by one scanning line; second control signal generating means for generating a second write control signal for controlling said field memory to write said inputted video signal therein and a second read control signal for controlling said field memory to read out said video signal therefrom so as to insert a video signal of one field having no data to said read video signal for a predetermined time interval in response to said external first and second vertical and horizontal synchronizing signals, and outputting the second write and read control signals to said field memory, the frequency of the second read control signal being set to be higher than that of the second write control signal depending on a ratio of the frequency of the read control signal to the frequency of the write control signal; first amplifying means for amplifying said video signal outputted from said field memory with a predetermined first amplification factor; second amplifying means for amplifying said video signal outputted from said delay means; and adding means for adding a video signal amplified by said first amplifying means and a video signal amplified by said second amplifying means so as to interpolating said video signal of one field having no data in the added video signal, and outputting the added video signal having the addition result.

Claim 13

A video signal converter apparatus comprising: first converting means for converting an inputted first video signal having a first field frequency lower than a predetermined field frequency and a predetermined number of scanning lines into an output second video signal having said predetermined field frequency and said predetermined number of scanning lines, using external first and second vertical and horizontal synchronizing signals, said first vertical and horizontal synchronizing signal being asynchronous with said second vertical and horizontal synchronizing signals, and outputting said output second video signal, said inputted first video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines, said first converting means comprising: first and second field memories each memory storing a video signal of one field; first judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on display means, and generating a first judgment signal for representing the judgment result; first control signal generating means for generating a first write control signal for controlling said first and second field memories alternately by one field of said inputted video signal to write said inputted video signal therein and a first read control signal for controlling said first and field memories to read out said video signal therefrom in response to said external first and second vertical and horizontal synchronizing signals, and outputting the first write and read control signals to said first and second field memories, said first control signal generating means delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field; and timing correction means for delaying said first read control signal by one scanning line when said first judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, thereby preventing said first read control signal from being generated prior to said first write control signal, and preventing said first write control signal from being generated prior to said first read control signal.

Claim 14

A video signal converter apparatus comprising: second converting means for converting an inputted third video signal having a first number of scanning lines smaller than a predetermined number of scanning lines and a predetermined field frequency into an output fourth video signal having said predetermined field frequency and said predetermined number of scanning lines, using external first and second vertical and horizontal synchronizing signals, said first vertical and horizontal synchronizing signal being asynchronous with said second vertical and horizontal synchronizing signals, and outputting said output fourth video signal, an inputted third video signal of one frame being composed of an odd field and an even field each field including a plurality of scanning lines, said second converting means comprising: first and second field memories each memory storing a video signal of one field; delay means for delaying said video signal outputted from said first and second field memories by one scanning line; second control signal generating means for generating a second write control signal for controlling said first and second field memories to write said inputted video signal therein and a second read control signal for controlling said first and second field memories to read out said video signal therefrom so as to insert a video signal of one field having no data to said read video signal for a predetermined time interval in response to said external first and second vertical and horizontal synchronizing signals, and outputting the second write and read control signals to said first and field memories, the frequency of the second read control signal being set to be higher than that of the second write control signal depending on a ratio of the frequency of the read control signal to the frequency of the write control signal; first amplifying means for amplifying said video signal outputted from said first and second field memory with a predetermined first amplification factor; second amplifying means for amplifying said video signal outputted from said delay means; adding means for adding a video signal amplified by said first amplifying means and a video signal amplified by said second amplifying means so as to interpolating said video signal of one field having no data in the added video signal, and outputting the added video signal having the addition result; further judgment signal generating means for judging whether or not the scanning lines of the odd field are replaced with the scanning lines of the even field when displaying the image of said inputted video signal on display means, and generating a further judgment signal for representing the judgment result; and timing correction means for delaying said second read control signal by one scanning line when said further judgment signal represents that the scanning lines of the odd field are replaced with the scanning lines of the even field, thereby preventing said second read control signal from being generated prior to said second write control signal, and preventing said second write control signal from being generated prior to said second read control signal.