Method and circuit for correcting track zero-crossing signal in optical disk system

Claim 2

A method as claimed in claim 1, wherein the edges of the raw track zero-crossing signal, the expected edge timing, and the expected intervals include on-edges and off-edges of the raw track zero-crossing signal, expected on-edge timing and off-edge timing, and expected intervals of on-edges and off-edges, respectively.

Claim 3

A method as claimed in claim 1 or 2, further comprising the steps of: detecting periods of the raw track zero-crossing signal; comparing the detected periods with a predetermined value, and allowing all of edges of the raw track zero-crossing signal to pass through as edges of the corrected track zero-crossing signal if the detected periods are greater than the predetermined value in the comparing step.

Claim 4

A method as claimed in claim 1, 2 or 3 wherein, in the generating step, the expected edge timing and the expected intervals are generated based on the past detected edges that have been allowed to pass through in the allowing step.

Claim 5

A circuit for correcting a raw track zero-crossing signal having a series of edges to produce a corrected track zero-crossing signal in an optical disk system, comprising: detecting means (110, 112) for detecting the edges of the raw track zero-crossing signal; control signal generating means (120, 122) for successively generating expected edge timing and expected intervals at which edges of the track zero-crossing signal are expected based on past detected edges, and sequence control means (116, 118) for allowing detected edges to pass through as edges of the corrected track zero-crossing signal if those edges are detected within the expected intervals; for obstructing detected edges if those edges are detected out of the expected intervals, and for adding edges as the edges of the corrected track zero-crossing signal at the expected edge timing if edges are not detected within expected intervals corresponding to the expected edge timing.

Claim 6

A circuit as claimed in claim 5, wherein the detecting means includes an edge pulse generating circuit outputting a series of detected edge pulses when the edges are detected; wherein the control signal generating means includes an expected edge pulse generating circuit successively outputting expected edge pulses at the expected edge timing, and a window signal generating circuit outputting a window signal indicating the expected intervals, and wherein the sequence control means includes a first gate circuit allowing the detected edge pulses to pass therethrough as edge pulses for the corrected track zero-crossing signal while the window signal is active, and a second gate circuit allowing the expected edge pulses to pass therethrough as edge pulses for the corrected track zero-crossing signal when the detected edge pulse does not appear while the window signal is active.

Claim 7

A circuit as claimed in claim 5 or 6, wherein the edges of the raw track zero-crossing signal, the expected edge timing, and the expected intervals include on-edges and off-edges of the raw track zero-crossing signal, expected on-edge timing and off-edge timing, and expected intervals of on-edges and off-edges, respectively.

Claim 8

A circuit as claimed in claim 5, 6 or 7 further comprising: period detecting means for detecting periods of the raw track zero-crossing signal, and comparison means for comparing the periods detected in the period detecting means with a predetermined means to thereby output a mask signal allowing all edges of the raw track zero-crossing signal to pass through as edges of the corrected track zero-crossing signal if the detected periods are greater than the predetermined value.

Claim 9

A circuit as claimed in claim 5, 6, 7, 8, or 9, wherein the control signal generating means generates the expected edge timing and the expected intervals based on the past detected edges that have been allowed to pass through the sequence control means.

Claim 10

A circuit for correcting a raw signal having a series of edges where a logic level of the signal alters to produce a corrected signal, comprising: detecting means for detecting the edges of the raw signal; control signal generating means for successively generating expected edge timing and expected intervals at which edges of the signal are expected based on past detected edges; and sequence control means for allowing detected edges to pass through as edges of the corrected signal if those edges are detected within the expected intervals; for obstructing detected edges if those edges are detected out of the expected intervals, and for adding edges as the edges of the corrected signal at the expected edge timing if edges are not detected within expected intervals corresponding to the expected edge timing.

Claim 11

An optical disk drive for reading and/or writing an optical disk (10) having tracks, comprising: an optical head (14) generating a light beam irradiating the optical disk, receiving a light signal reflected from the optical disk, and converting the light signal into electrical signals including a track error signal indicating deviation of the irradiating position of the light beam from the tracks; actuator means (18, 82) for moving the irradiating position; servo means (22, 24) driving the actuator means; a comparator (84) generating a raw track zero-crossing signal by slicing the track error signal by a track offset, the row track zero-crossing signal being at a logic level when track zero-crossing signal is above the track offset and being at another logic level when the track zero-crossing signal is below the track offset; a signal correction circuit (26) correcting the raw track zero-crossing signal to thereby for a corrected track zero-crossing signal; a track counter circuit (28) counting a number of tracks crossed by the irradiating position based on the corrected track zero-crossing signal, and measuring a track-crossing interval based on the corrected track zero-crossing signal; and control means (30) controlling the servo means in accordance with the crossed track number and the track-crossing interval from the track counter circuit so that the irradiating position is moved to a designated track; characterized in that the signal correction circuit (26) includes: detecting means (110, 112) for detecting edges of the raw track zero-crossing signal where said logic level changes; control signal generating means (120, 122) for successively generating expected edge timing and expected intervals at which edges of the track zero-crossing signal are expected based on past detected edges, and sequence control means (116, 118) for allowing detected edges to pass through as edges of the corrected track zero-crossing signal if those edges are detected within the expected intervals; for obstructing detected edges if those edges are detected out of the expected intervals, and for adding edges as the edges of the corrected track zero-crossing signal at the expected edge timing if edges are not detected within expected intervals corresponding to the expected edge timing.