EP0501687A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Buried antifuse
Assignee: AT&T Inc
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Filing: 1992-02-21
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Granted: —
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Expires: 2012-02-21
Abstract
Abstract An integrated circuit having one or more antifuses which connect electrical components through a dielectric layer. The antifuse is formed before the thick dielectric is deposited and patterned to form windows which expose the antifuse.
Inventors
- 👤 Steven Alan Lytle
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 23:43
CPC Classifications
H; H10; H10B; H10B69/00; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10W20/01; H10W20/031; H10W20/064; H10W20/065; Y; Y10; Y10S; Y10S148/00; Y10S148/055
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
66 words
A metod of integrated circuit fabrication comprising forming an antifuse by the steps of forming a plurality of patterned conductors(3) on a substrate(1); depositing a first dielectric layer(7) on said patterned conductors(3); patterning said first dielectric layer(7) to form at least a first window which exposes portions of the top surface of said patterned conductors(3); and, forming a layer of amorphous silicon(9) on said exposed portions.
Claim 2
Dependent Claim
66 words
A metod of integrated circuit fabrication comprising forming an antifuse by the steps of forming a plurality of patterned conductors(3) on a substrate(1); depositing a first dielectric layer(7) on said patterned conductors(3); patterning said first dielectric layer(7) to form at least a first window which exposes portions of the top surface of said patterned conductors(3); and, forming a layer of amorphous silicon(9) on said exposed portions.
Claim 3
Dependent Claim
27 words
A method as recited in claim 1 in which said forming comprises the further steps of depositing and patterning said amorphous silicon(9) to cover said exposed portions.
Claim 4
Dependent Claim
38 words
A method as recited in claim 2 comprising the fur- ter steps of depositing a second dielectric layer(15) and patterning said second dielectric layer(15) to form at least a second window which exposes portions of said amorphous silicon(9).
Claim 5
Dependent Claim
22 words
A method as recited in claim 3 comprising the further step of depositing a metal(17) in said at least a second window.
Claim 6
Dependent Claim
30 words
A method as recited in claim 4 comprising the further step of depositing at least one layer(11) of conductive material, said at least one layer(11) being adjacent said amorphous silicon.
Claim 7
Dependent Claim
37 words
A method as recited in claim 4 comprising the further step of depositing at least one layer(5) of barrier material, said at least one layer(5) being between said amorphous silicon(9) and said patterned conductor(3) or said metal(17).
Claim 8
Dependent Claim
31 words
A method as recited in claim 4 comprising the fur- ter step of applying a voltage across the amorphous silicon(9) in excess of the threshold voltage thereby programming said amorphous silicon(9).
Claim 9
Dependent Claim
20 words
A method as recited in claim 1 in which said first windows have an aspect ratio of 0.5:1 or smaller.
References Cited (Backward Citations)
No citation records indexed.
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