EP0492968A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Multiple instruction issue
Assignee: STMicroelectronics Ltd Great Britain
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Filing: 1991-12-18
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Granted: —
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Expires: 2011-12-18
Abstract
Abstract Computer appratus includes an instruction execution unit (13) having a plurality of functional units (14,16) each arranged to execute at least part of an instruction and instruction issuing circuitry (10,12) for issuing simultaneously a group of separate compatible instructions to the execution unit (13) the circuitry (12) having means for classifying each instruction in dependence on the or each functional unit required for execution of that instruction and means for testing the classification of successive instructions and selecting a group which according to their classification are compatible for simultaneous issue to the execution unit (13) without conflicting demands on any function unit (14,16) in the execution unit.
Inventors
- 👤 Saeid Azmoodeh
- 👤 Peter Malcolm Keith Boffey
- 👤 Richard Matthew Forsyth
- 👤 Brian Jeremy Parsons
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 22:13
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3818; G06F9/3822; G06F9/3824; G06F9/3836; G06F9/3853; G06F9/3885
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
130 words
A method of executing a plurality of instructions in a computer system having a program formed by a plurality of said instructions, in which each instruction is executed in an execution unit having a plurality of functional units, said method comprising identifying a succession of separate instructions to be executed, classifying each instruction in said succession dependent on the or each functional unit required for the execution of that instruction, selecting a group of instructions from said succession which according to their classification are compatible for simultaneous issue to the execution unit without conflicting demands on any functional unit in the execution unit, decoding said group of instructions while retaining the separate identity of each instruction, issuing said group simultaneously to the execution unit, and executing said group of instructions.
Claim 2
Independent Claim
135 words
A method of executing a plurality of instructions in a computer system having a program formed by a succession of said instructions, said method comprising executing each instruction in an execution unit having a plurality of stages each comprising at least one functional unit, a plurality of separate compatible instructions being issued simultaneously as a group to the execution unit, the group including at least one instruction which is dependent on another instruction in the group by requiring data to be provided by execution of said another instruction, executing said group of instructions in the execution unit and selectively interconnecting said functional units whereby said data derived from execution of said another instruction by one functional unit is output from said one functional unit and input to another functional unit which executes said one instruction.
Claim 3
Dependent Claim
43 words
A method according to claim 2 including identifying a succession of instructions to be executed and prior to issuing instructions to said execution unit, testing said succession of instructions to determine a compatible group of instructions for issuing simultaneously to said execution unit.
Claim 4
Dependent Claim
52 words
A method according to claim 3 in which said testing comprises receiving a first instruction in a succession of instructions, accepting consecutive instructions which pass a compatibility test and terminating the group after the last instruction to pass the compatibility test, or at a predetermined maximum number of instructions for the group.
Claim 5
Dependent Claim
40 words
A method according to claim 3 or claim 4 in which instructions are tested consecutively to form a succession of compatible groups, the first instruction in each group being the next instruction after the last instruction in the previous group.
Claim 6
Independent Claim
51 words
A method according to any one of claims 2 to 5 in which said testing of a succession of instructions include classifying each instruction in said succession dependent on the or each functional unit required for execution of that instruction and selecting a group of instructions in dependence on their classification.
Claim 7
Independent Claim
39 words
A method according to any one of claims 2 to 6 wherein execution of said group of instructions includes executing a plurality of said separate instructions in said group simultaneously by one or more stages of the execution unit.
Claim 8
Independent Claim
29 words
A method according to any one of claims 2 to 7 in which a succession of groups of instructions are issued to the execution unit in a pipelined sequence.
Claim 9
Dependent Claim
28 words
A method according to claim 8 in which instructions are obtained from a program store and decoded as a pipelined sequence prior to supplying to the execution unit.
Claim 10
Independent Claim
54 words
A method according to any one of claims 2 to 9 in which each stage of operation of the execution unit is effected in one execution cycle and said execution unit is operated in a pipelined manner whereby a new group of compatible instructions is fed to the execution unit in each execution cycle.
Claim 11
Independent Claim
65 words
A method according to any one of claims 2 to 10 wherein first and second operands are generated by one or more functional units in two stages of the execution unit, an arithmetic operation is effected by a functional unit in a third stage of the execution unit and in a fourth stage of the execution unit a result is written to a store location.
Claim 12
Dependent Claim
18 words
A method according to claim 11 wherein said execution unit is arranged to execute a program jump instruction.
Claim 13
Dependent Claim
115 words
Computer apparatus comprising a processor and memory for holding a sequence of instructions to be executed, said apparatus comprising an instruction execution unit having a plurality of functional units each arranged to execute at least part of an instruction and instruction issuing circuitry for issuing simultaneously a group of separate compatible instructions to said execution unit, said circuitry having means for classifying each instruction in dependence on the or each functional unit required for execution of that instruction, means for testing the classification of successive instructions and selecting a group which according to their classification are compatible for simultaneous issue to the execution unit without conflicting demands on any function unit in the execution unit.
Claim 14
Dependent Claim
51 words
Computer apparatus according to claim 13 in which said functional units in the execution unit have selective interconnections whereby data derived from execution of one instruction by one functional unit is output from said one functional unit and input to a second functional unit which executes another instruction in said group.
Claim 15
Dependent Claim
23 words
Computer apparatus according to claim 13 or claim 14 in which said functional units form a succession of stages in said execution unit.
Claim 16
Dependent Claim
28 words
Computer apparatus according to claim 15 in which at least one stage of the execution unit has a plurality of Eunctional units arranged to execute respective instructions simultaneously.
Claim 17
Dependent Claim
25 words
Computer apparatus according to any one of claims 13 to 16 including decoding circuitry, said decoding circuitry and execution unit being arranged as a pipeline.
References Cited (Backward Citations)
No citation records indexed.
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