Patent US1160067A successfully refreshed from Google Patents.
EP0489583A2
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Multiple processor cache control system
Assignee: NCR International Inc
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Filing: 1991-12-04
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Granted: —
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Expires: 2011-12-04
Abstract
Abstract A tightly coupled, cache coherent computer system (100) utilizes a crossbar switch (182) to increase memory system and memory bus bandwidth, thus eliminating bottlenecks. Local directories (118,136,154,172), one for each node (174,176,178,180) keep track of valid data and eliminate bottlenecks associated with cache coherency. The system (100) is also scalable, easily allowing expansion by adding further processors, for example.
Inventors
- 👤 Donald G. Tipon
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 02:18
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/17368; G06F15/17375; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0806; G06F12/0813; G06F12/0815; G06F12/0817; G06F2212/00; G06F2212/25; G06F2212/254; G06F2212/2542
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
58 words
A tightly coupled system having cache coherency, characterized by: a plurality of nodes (174,176,178,180) having respective processing means (102-108;120-126;138-144;156-162) and respective memory means (114,116;132,134;150,152;168,170) connected thereto; a plurality of caches associated with said processing means (102-108;120-126;138-144;156-162); and crossbar switching means (182) adapted to directly connect any one of said nodes (174,176,178,180) to any other of said nodes (174,176,178,180).
Claim 2
Dependent Claim
47 words
A tightly coupled computer system according to claim 1, characterized in that said nodes (174,176,178,180) have respective lookaside directories (118,136,154,172) coupled thereto, each said lookaside directory (e.g. 118) being adapted to control cache coherency for the memory means (e.g. 114,116) connected to the associated node (e.g. 174).
Claim 3
Dependent Claim
42 words
A tightly coupled computer system according to claim 1 or claim 2, characterized in that each said lookaside directory (e.g. 118) is adapted to maintain an identification of the location of valid cached data originating from the associated memory means (e.g. 114,116).
Claim 4
Dependent Claim
106 words
A tightly coupled computer system according to any one of the preceding claims, characterized in that each node (e.g. 174) is connected to an associated memory system bus (e.g. 110) to which associated data requesting devices, including the associated processing means (e.g. 102-108) are connected, and in that each data requesting device requesting a memory address via an associated memory system bus (e.g. 110) releases that memory system bus (e.g. 110) once a request has been made by a first requesting device, to allow other data requesting devices to make requests over the memory system bus before requested data is received by said first requesting device.
Claim 5
Dependent Claim
32 words
A tightly coupled computer system according to any one of claims 2 to 4, characterized in that lookaside directory (e.g. 118) is adapted to store semaphore signals utilized in memory lock operations.
Claim 6
Dependent Claim
28 words
A tightly coupled computer system according to any one of the preceding claims, characterized in that said crossbar switching means (182) is implemented by an integrated circuit chip.
References Cited (Backward Citations)
No citation records indexed.
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