EP0486167A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Multiple computer system with combiner/memory interconnection system
Assignee: International Business Machines Corp
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Filing: 1991-10-22
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Granted: —
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Expires: 2011-10-22
Abstract
Abstract A combiner/memory system interconnects a plurality of computer systems using for example the new HIPPI standard link. The combiner system includes it's own internal storage for rapid shared access to all connected computer systems. The combiner/memory system includes a smart switch for reading header information, arbitrating messages and connecting computers to each other or to the internal shared storage. The system also includes a mechanism for synchronization of cooperating processes.
Inventors
- 👤 Christine Marie Desnoyers
- 👤 Derrick Leroy Garmire
- 👤 Sheryl Marie Genco
- 👤 Donald George Grice
- 👤 William Robert Milani
- 👤 Michael Patrick Muhlada
- 👤 Donna Carol Myers
- 👤 Peter Kenneth Szwed
- 👤 Vadim Miron Tsinker
- 👤 Antoinette Elaine Vallone
- 👤 Carl Alfred Bender
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 08:21
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/17368; G06F15/17375; F; F02; F02B; F02B75/00; F02B75/02; F02B2075/022; F02B2075/027
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
130 words
A data processing system comprising: a plurality of computers each having a direct memory access link adapter that sends and receives signals in packets with a header page at the start of each new packet identifying command and destination information; a combiner/memory system including internal shared memory means and switch means and having a plurality of ports with a direct link adapter at each port that sends and receives signals in packets at said ports; a direct memory access link coupled between each one of said computers and a different one of said ports at said adapters; said switch means including means responsive to a received header page for coupling said packets to another computer or to said internal shared memory according to the command information in the header page.
Claim 2
Dependent Claim
16 words
The system of claim 1 when in said direct memory access link is a HIPPI link.
Claim 3
Dependent Claim
55 words
The system of claim 1 or 2 wherein said internal memory means includes a plurality of memory modules and said switch means includes means for distributing data stored over said plurality of memory modules beginning at a start address indicated on the header page so as to permit interleaved access to said shared internal memory.
Claim 4
Dependent Claim
29 words
The system of claim 1, 2 or 3 including locking means responsive to a lock command for locking allocation to a block of data in said internal shared memory.
Claim 5
Dependent Claim
48 words
The system of claim 4 wherein said locking means includes a locking table storing a lock identification at a location in the lock table and wherein if the location is available it is locked with an identification and if not the requestor is notified that the lock failed.
Claim 6
Independent Claim
47 words
The system of any one of claims 1 to 5 wherein said switch means includes an input buffer which can store the header and data pages pertaining to different packets and can allow new data to be written into said buffer while old data is read out.
Claim 7
Dependent Claim
42 words
The system of claim 6 wherein said switch means includes a linked list which has a list of pointers that contains an entry for each page stored in said input buffer indicating the address of the next page in the header/page sequence.
Claim 8
Independent Claim
51 words
The system of any one of claims 1 to 7 wherein said switch means includes a round robin arbitration of the sources applied to the switch and means for storing the status of the connections to the memory modules and the other computers for coupling only when they are not busy.
Claim 9
Independent Claim
69 words
The system of any one of claims 1 to 8 wherein said switch means includes a command interpreter including a control store responsive to said command address from said header page, a condition address from condition points of said system and a state address from the condition control points selected by said control store and wherein said control points are decoded from said data out of said control store.
Claim 10
Dependent Claim
130 words
A combiner/memory system for use in interconnecting a plurality of computers each having a direct memory access link adapter that sends and receives signals in packets with a header page at the start of each new packet identifying command and destination information, comprising: internal shared memory means and switch means and having a plurality of ports with a direct link adapter at each port that sends and receives signals in packets at said ports, and a direct memory access link for coupling each one of said computers and a different one of said ports at said adapters, said switch means including means responsive to a received header page for coupling said packets to another computer or to said internal shared memory according to the command information in the header page.
Claim 11
Dependent Claim
16 words
The combiner/memory system of claim 10 wherein said direct memory access link is a HIPPI link.
Claim 12
Dependent Claim
56 words
The combiner/memory system of claim 10 or 11 wherein said internal memory means includes a plurality of memory modules and said switch means includes means for distributing data stored over said plurality of memory modules beginning at a start address indicated on the header page so as to permit interleaved access to said shared internal memory.
Claim 13
Dependent Claim
30 words
The combiner/memory system of claims 10, 11 or 12 including locking means responsive to a lock command for locking allocation to a block of data in said internal shared memory.
Claim 14
Dependent Claim
48 words
The combiner/memory system of claim 13 wherein said locking means includes a locking table storing a lock identification at a location in the lock table and wherein if the location is available it is locked with an identification and if not the requester is notified the lock failed.
Claim 15
Dependent Claim
48 words
The combiner/memory system of any one of claims 10 to 14 wherein said switch means includes an input buffer which can store the header and data pages pertaining to different packets and can allow new data to be written into said buffer while old data is read out.
Claim 16
Dependent Claim
43 words
The combiner/memory system of claim 15 wherein said switch means includes a linked list which has a list of pointers that contains an entry for each page stored in said input buffer indicating the address of the next page in the header/page sequence.
Claim 17
Dependent Claim
52 words
The combiner/memory system of any one of claims 10 to 16 wherein said switch means includes a round robin arbitration of the sources applied to the switch and means for storing the status of the connections to the memory modules and the other computers for coupling only when they are not busy.
Claim 18
Dependent Claim
63 words
The combiner/memory system of any one of claims 10 to 17 wherein said switch means includes a command interpreter including a control store responsive to said command address from said header page a condition address from said condition points and a state address from the condition control points and wherein said control points are decoded from said data out of said control store.
Claim 19
Dependent Claim
40 words
The combiner/memory system of any one of claims 10 to 18 wherein the data being decoded out of the control store for system control points is used in it's entirety as part of the next address to the control store.
References Cited (Backward Citations)
No citation records indexed.
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