EP0482550A1
Expired / Lapsed
EP
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A virtual identifier conversion system
Assignee: Fujitsu Ltd
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Filing: 1991-10-21
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Granted: —
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Expires: 2011-10-21
Abstract
Abstract A virtual channel converter converts a virtual path identifier and a virtual channel identifier, e.g. in a twenty-eight (28) bit frame, attached to the header part of an incoming ATM cell on an input highway to an ATM switcher to identifiers to be attached to an outgoing ATM cell on an output highway capable of fully supporting all the combinations, two hundred fifty-six (256) for example, of a virtual path identifier and a virtual channel identifier no matter where the virtual path identifier and the virtual channel identifier are located in the twenty-eight (28) bit frame. The virtual channel converter comprises a plurality of identifier comparator units and a controller. Each of the identifier comparator units has an input identifier memory for storing an identifier attached to an ATM cell and a comparator for comparing the identifiers of an incoming ATM cell with the identifiers stored in the input identifier memory. The controller instructs respective input identifier memories to store all the values of identifiers attached to incoming ATM cells from a user to a switcher on a one-to-one basis.
Inventors
- 👤 Hiroshi c/o FUJITSU LIMITED Miyake
- 👤 Satoshi c/o Fujitsu Limited Kakuma
- 👤 Shuji c/o Fujitsu Limited Yoshimura
- 👤 Naoki c/o Fujitsu Limited Aihara
- 👤 Naoki c/o FUJITSU KYUSHU COMM.SYSTEM LTD. Fukuda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 17:33
CPC Classifications
H; H04; H04L; H04L49/00; H04L49/30; H04L49/3081; H04L49/309; H04L49/3009
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
209 words
A virtual identifier conversion system, put in a stage preceding a switcher for use in a broadband integrated services digital network, for converting a virtual path identifier and a virtual channel identifier attached to an ATM cell on an input highway of said switcher to a virtual path identifier and a virtual channel identifier to be attached to said ATM cell on an output highway and for attaching a tag for routing said ATM cell in said switcher, said virtual identifier conversion system comprising: a plurality of identifier comparator units, each comprising an input identifier storing means for storing said virtual path identifier and said virtual channel identifier attached to the header part of said ATM cell on said input highway, and a comparing means for comparing for a match said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway with the content stored in said input identifier storing means; and a controlling means for storing all the combinations of a virtual path identifier and a virtual channel identifier attachable to an ATM cell inputted to said switcher, on a one-to-one basis, in an appropriate one of said input identifier storing means respectively in said plurality of identifier comparator units.
Claim 2
Dependent Claim
209 words
A virtual identifier conversion system, put in a stage preceding a switcher for use in a broadband integrated services digital network, for converting a virtual path identifier and a virtual channel identifier attached to an ATM cell on an input highway of said switcher to a virtual path identifier and a virtual channel identifier to be attached to said ATM cell on an output highway and for attaching a tag for routing said ATM cell in said switcher, said virtual identifier conversion system comprising: a plurality of identifier comparator units, each comprising an input identifier storing means for storing said virtual path identifier and said virtual channel identifier attached to the header part of said ATM cell on said input highway, and a comparing means for comparing for a match said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway with the content stored in said input identifier storing means; and a controlling means for storing all the combinations of a virtual path identifier and a virtual channel identifier attachable to an ATM cell inputted to said switcher, on a one-to-one basis, in an appropriate one of said input identifier storing means respectively in said plurality of identifier comparator units.
Claim 3
Dependent Claim
179 words
The virtual identifier conversion system according to claim 1, wherein: said input identifier storing means comprises a first register for holding said virtual path identifier and said virtual channel identifier; said comparing means comprises exclusive OR gates, each receiving the content of the corresponding bit stored in said first register in negative logic at their first input terminals and each bit of said virtual path identifier and virtual channel identifier attached to an ATM cell inputted from said input highway at their second input terminals, said exclusive OR gates provided a number equal to the total number of bits composing said virtual path identifier and said virtual channel identifier; said comparing means further comprises a NAND gate for receiving all outputs from said exclusive OR gates; said controlling means comprises a call processor for controlling the switching of said ATM cell and an order taker/server for having said first register hold the values of the virtual path identifier and virtual channel identifier attached to an ATM cell inputted from an input highway under the control of said call processor.
Claim 4
Dependent Claim
148 words
The virtual identifier conversion system according to claim 1, wherein each of said plurality of identifier comparator units further comprises: output identifier storing means, controlled by said controlling means, said output identifier storing means being for storing a virtual path identifier and a virtual channel identifier to be attached to an ATM cell on an output highway, as well as a tag for routing said ATM cell in said switcher; output controlling means for outputting the contents of said output identifier storing means when said comparing means detects a match; and a header inserting means for inserting the contents of one of said output identifier storing means into the header part of said ATM cell on its way to said switcher, said one of said output identifier storing means included in the one of said identifier comparator units having the one of said comparing means detecting a match.
Claim 5
Dependent Claim
147 words
The virtual identifier conversion system according to claim 2, wherein each of said plurality of identifier comparator units further comprises: output identifier storing means controlled by said controlling means, said output identifier storing means for storing a virtual path identifier and a virtual channel identifier to be attached to an ATM cell on an output highway, as well as a tag for routing said ATM cell in said switcher; output controlling means for outputting the contents of said output identifier storing means when said comparing means detects a match; and a header inserting means for inserting the contents of one of said output identifier storing means into the header part of said ATM cell on its way to said switcher, said one of said output identifier storing means included in the one of said identifier comparator units having the one of said comparing means detecting a match.
Claim 6
Dependent Claim
189 words
The virtual identifier conversion system according to claim 3, wherein: each of said plurality of output identifier storing means comprises a second register for holding said virtual path identifier, said virtual channel identifier, and said tag for routing said ATM cell in the switcher; each of said output controlling means comprises three state bus drivers for receiving the data of respective bits held in said second register, the number of said three state bus drivers being equal to the total number of bits in said virtual path identifier, said virtual channel identifier and said tag inputted to a control input terminal receiving a match signal from one of said comparing means; and said header inserting means comprises a delayer for delaying said ATM cell inputted from said input highway by two and a half (2.5) cycles of a clock signal, a first selector for sequentially outputting the data held in said second register in the order of a tag, a virtual path identifier and a virtual channel identifier, and a second selector for sequentially outputting an output from said first selector and an output from said delayer by switching.
Claim 7
Dependent Claim
189 words
The virtual identifier conversion system according to claim 4, wherein: each of said plurality of output identifier storing means comprises a second register for holding said virtual path identifier, said virtual channel identifier, and said tag for routing said ATM cell in the switcher; each of said output controlling means comprises three state bus drivers for receiving the data of respective bits held in said second register, the number of said three state bus drivers being equal to the total number of bits in said virtual path identifier, said virtual channel identifier and said tag inputted to a control input terminal receiving a match signal from one of said comparing means; and said header inserting means comprises a delayer for delaying said ATM cell inputted from said input highway by two and a half (2.5) cycles of a clock signal, a first selector for sequentially outputting the data held in said second register in the order of a tag, a virtual path identifier and a virtual channel identifier, and a second selector for sequentially outputting an output from said first selector and an output from said delayer by switching.
Claim 8
Dependent Claim
96 words
The virtual identifier conversion system according to claim 3, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminals of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 9
Dependent Claim
96 words
The virtual identifier conversion system according to claim 4, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminal of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 10
Dependent Claim
96 words
The virtual identifier conversion system according to claim 5, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminals of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 11
Dependent Claim
96 words
The virtual identifier conversion system according to claim 6, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminal of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 12
Dependent Claim
129 words
The virtual identifier conversion system according to claim 1, further comprising: an output identifier storing means, controlled by said controlling means, for storing said all the combinations of a virtual path identifier, a virtual channel identifier and a tag to be attached to said ATM cell on said output highway; an address specifying means for receiving respective outputs from said comparing means, said address specifying means for specifying an address in said output identifier storing means; and a header inserting means for inserting the data of the address in said output identifier storing means in the header part of said ATM cell on its way to said switcher, said address being specified by said address specifying means, said data corresponding to the contents of said input identifier storing means.
Claim 13
Dependent Claim
129 words
The virtual identifier conversion system according to claim 2, further comprising: an output identifier storing means, controlled by said controlling means, for storing said all the combinations of a virtual path identifier, a virtual channel identifier and a tag to be attached to said ATM cell on said output highway; an address specifying means for receiving respective outputs from said comparing means, said address specifying means for specifying an address in said output identifier storing means; and a header inserting means for inserting the data of the address in said output identifier storing means in the header part of said ATM cell on its way to said switcher, said address being specified by said address specifying means, said data corresponding to the contents of said input identifier storing means.
Claim 14
Dependent Claim
96 words
The virtual identifier conversion system according to claim 11, wherein: said output identifier storing means comprises a random access memory for storing said combinations of a virtual path identifier, a virtual channel and a tag; and said address specifying means comprises an encoder for converting outputs from respective comparing means in said plurality of identifier comparator units to read addresses in said random access memory, and a selector for outputting, to said random access memory, write addresses supplied by said controlling means in data writing and said read addresses supplied by said encoder in data reading.
Claim 15
Dependent Claim
96 words
The virtual identifier conversion system according to claim 12, wherein: said output identifier storing means comprises a random access memory for storing said combinations of a virtual path identifier, a virtual channel and a tag; and said address specifying means comprises an encoder for converting outputs from respective comparing means in said plurality of identifier comparator units to read addresses in said random access memory, and a selector for outputting, to said random access memory, write addresses supplied by said controlling means upon writing data and said read addresses supplied by said encoder upon reading data.
Claim 16
Dependent Claim
96 words
The virtual identifier conversion system according to claim 11, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminals of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 17
Dependent Claim
96 words
The virtual identifier conversion system according to claim 12, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminal of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 18
Dependent Claim
96 words
The virtual identifier conversion system according to claim 13, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminals of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 19
Dependent Claim
96 words
The virtual identifier conversion system according to claim 14, wherein said virtual channel converter further comprises: a third register for holding said virtual path identifier and said virtual channel identifier attached to said ATM cell inputted from said input highway, and for outputting the held data of respective bits in said virtual path identifier and said virtual channel identifier to said second input terminal of said exclusive OR gates in said comparing means; and a timing generator for generating a timing for having said third register hold said virtual path identifier and said virtual channel identifier.
Claim 20
Dependent Claim
82 words
The virtual channel identifier conversion system according to claim 1, wherein: said virtual path identifier and said virtual channel identifier in the header part of said ATM cell comprise twenty-four (24) bits in total, when said switcher switches said ATM between a user and a network; and said virtual path identifier and said virtual channel identifier in the header part of said ATM cell comprise twenty-eight (28) bits in total, when said switcher switches said ATM between a user and a network.
Claim 21
Dependent Claim
78 words
The virtual channel identifier conversion system according to claim 1, wherein: said virtual channel converter eliminates one (1) byte for a header error control from among the five (5) bytes in the header part of said ATM cell from said input highway, and attaches a tag for routing said ATM cell in said switcher to said ATM cell on its way to said switcher, thereby making the header part a sum of said tag and four (4) bytes.
References Cited (Backward Citations)
GB2167219A
Cited
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