Device for interconnecting channels

Claim 2

Apparatus of claim 1, characterized in that said predefined criteria includes no other channel having a request pending for connection to said another adapter.

Claim 3

Apparatus of claim 2, characterized in that said predefined criteria includes a requirement that if the another channel has a pending request that said request be directed to said requesting channel.

Claim 4

Apparatus of claim 1, characterized in that said microprocessor responds to requests which do not meet said criteria by posting a retry command to said channel adapter.

Claim 5

Apparatus of claim 1, characterized by a link request storage table for storing the identity of channels having a link request meeting said criteria.

Claim 6

Apparatus of claim 1, characterized in that link requests meeting said criteria are stored in a link request table awaiting a matching request from said another channel, and that said link request table stores each request from an adapter in a location identified with said adapter.

Claim 7

Apparatus of claim 6 wherein said adapter issues an interrupt to said microprocessor which identifies that architected conditions for channel adapters involved in a channel request for connection are met, and said microprocessor acts on said link request.

Claim 8

Apparatus of one of claims 1-7, characterized by a bus DII (device information interface) interconnecting said adapters; adapter logic at said adapter receiving a channel connect request for initiating request over said bus DII (device information interface) for status information regarding said another channel; memory (50) at said another adapter for storing information relating to the status of said another channel; and, adapter logic at said another adapter for decoding said request for status information, addressing said memory (50), and providing said status information to said bus DII (device information interface) for transmission to said adapter receiving a channel connect request.

Claim 9

Apparatus as set forth in one of claims 1-8, characterized by a plurality of channel adapters, each adapter connected to receive an OEMI channel, said channel supplying a request from a first device to address a second device associated with another channel device connected to another channel adapter; adapter logic circuit at each channel adapter, said adapter logic circuit decoding said request at a channel receiving said request, and initiating an inquiry to said associated device for status information over a device interface bus, and determining whether said first and second devices should be connected, said adapter logic circuit at said another channel adapter providing said status information of said device associated with said second connected channel device over said device interface bus; a microprocessor connected by a control bus to each of said adapters to receive an interrupt from said adapter logic which has determined that said devices should be connected and to receive the identity of said first adapter generating said interrupt and the adapter associated with said second device; and, a data bus interconnecting each of said channel adapters through respective multiplexers, a pair of multiplexers being enabled by said microprocessor in response to said interrupt received over said control bus.

Claim 10

Apparatus of claim 9, wherein said microprocessor (39) is programmed to: establish a link request table in memory identifying which channel adapters are to be interconnected; and, determine in accordance with predetermined criteria, whether said channel adapter issuing an interrupt should have a request entered in said link request table.

Claim 11

Apparatus of claim 10, wherein said predetermined criteria includes the absence of a pending entry in said look up table requesting connection to only one of said identified channel adapters.

Claim 12

Apparatus of claim 10, wherein said microprocessor enters a link request in said link request table when there are no previous pending requests for connection to said another channel adapter, and further supplies over said control bus to said another adapter data indicating said other channel should attempt access to said channel initiating a request.