EP0472340A1
Expired / Lapsed
EP
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A compensation method and apparatus for enhancing single ended to differential conversion
Assignee: Qorvo US Inc
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Filing: 1991-08-12
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Granted: —
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Expires: 2011-08-12
Abstract
Abstract A compensation method and apparatus for enhancing single-ended to differential conversion includes a compensation network that is coupled between the single-ended voltage input and the bias terminal of a differential stage. The compensation network has an impedance substantially equal to the impedance presented by the bias circuit used to bias the differential stage. Accordingly, the compensation network provides a current that substantially cancels the signal tail current supplied to the bias terminal of the differential stage, resulting in a balanced differential output. The compensation network may be AC coupled from the single-ended voltage input to the bias terminal in order to preserve the original DC operating condition. The compensation network may be chosen to provide more cancelling current at higher operating frequencies. Additionally, the compensation network can be configured to match a bias circuit built from resistors, transistors, current mirrors, or the like.
Inventors
- 👤 Wesley H. Hayward
- 👤 Stewart S. Taylor
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 16:27
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45376; H03F3/45381; H03F1/00; H03F1/32; H03F1/3211; H03F3/45479; H03F3/45632; H03F3/45695; H03F3/45699; H03F3/45708; H03F3/45744; H03F3/45766; H03F2203/00; H03F2203/45; H03F2203/45702
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
112 words
A circuit for converting a single-ended voltage into a balanced differential current comprising: (a) a differential stage having a single-ended voltage input, a differential current output, and a bias terminal for receiving a bias tail current; (b) means for supplying a bias tail current coupled to the bias terminal of the differential stage, the supplying means having a finite output impedance and an associated signal tail current; and (c) means coupled between the single-ended voltage input and the bias terminal of the differential stage having an impedance substantially equal to the output impedance of the supplying means for cancelling the signal tail current supplied to the bias terminal of the differential stage.
Claim 2
Dependent Claim
34 words
A circuit as in claim 1 further comprising a pair of load resistors coupled to the differential current output of the differential stage for converting the differential current output to a differential voltage output.
Claim 3
Dependent Claim
19 words
A circuit as in claim 1 in which the supplying means comprises a first resistor having a predetermined value.
Claim 4
Dependent Claim
26 words
A circuit as in claim 3 in which the cancelling means comprises a second impedance having a value substantially equal to that of the first resistor.
Claim 5
Dependent Claim
39 words
A circuit as in claim 3 in which the cancelling means comprises a second impedance having a value substantially equal to that of the first resistor within a predetermined frequency band and a frequency dependant value above the band.
Claim 6
Dependent Claim
41 words
A circuit as in claim 3 in which the cancelling means comprises a transistor having a control terminal coupled to the single-ended voltage input of the differential stage and a controlled terminal coupled to the bias terminal of the differential stage.
Claim 7
Dependent Claim
20 words
A circuit as in claim 1 in which the supplying means further comprises means for supplying an additional bias current.
Claim 8
Dependent Claim
82 words
A circuit as in claim 7 in which the cancelling means comprises: (a) a current source having an output coupled to the bias terminal of the differential stage and a bias terminal for receiving a first portion of the additional bias current; and (b) level shifting means having an input coupled to the single-ended voltage input of the differential stage and an output coupled to the bias terminal of the current source for receiving a second portion of the additional bias current.
Claim 9
Dependent Claim
49 words
A circuit as in claim 1 in which the supplying means comprises a transistor having a first controlled terminal coupled to a source of supply voltage, a second controlled terminal coupled to the bias terminal of the differential stage, and a control terminal coupled to the first controlled terminal.
Claim 10
Dependent Claim
51 words
A circuit as in claim 9 in which the cancelling means comprises a transistor having a control terminal coupled to the single-ended voltage input of the differential stage, a first controlled terminal coupled to the control terminal, and a second controlled terminal coupled to the bias terminal of the differential stage.
Claim 11
Dependent Claim
33 words
A circuit as in claim 10 in which the cancelling means further comprises level shifting means interposed between the single-ended voltage input of the differential stage and the control terminal of the transistor.
Claim 12
Dependent Claim
87 words
A circuit as in claim 1 in which the supplying means comprises: (a) a transistor having a control terminal, a first controlled terminal, and a second controlled terminal coupled to the bias terminal of the differential stage; (b) a diode having a first terminal coupled to the control terminal of the transistor for receiving a reference current and a second terminal coupled to a source of supply voltage; and (c) a resistor coupled between the first controlled terminal of the transistor and the source of supply voltage.
Claim 13
Dependent Claim
21 words
A circuit as in claim 12 in which the supplying means further comprises means for supplying an additional bias tail current.
Claim 14
Dependent Claim
93 words
A circuit as in claim 13 in which the cancelling means comprises: (a) a transistor having a control terminal coupled to the single-ended voltage input of the differential stage, a first controlled terminal, and a second controlled terminal coupled to the bias terminal of the differential stage; (b) a diode having a first terminal coupled to the control terminal of the transistor and a second terminal for receiving the additional bias tail current; and (c) a resistor coupled between the first controlled terminal of the transistor and the second terminal of the diode.
Claim 15
Dependent Claim
33 words
A circuit as in claim 13 in which the cancelling means further comprises level shifting means interposed between the single-ended voltage input of the differential stage and the control terminal of the transistor.
Claim 16
Dependent Claim
34 words
A circuit as in claim 1 in which the differential stage differential current output comprises first and second single-ended outputs, the first single-ended output having an associated parasitic capacitance coupled to the single-ended input.
Claim 17
Dependent Claim
65 words
A circuit as in claim 16 further comprising: (a) a unity gain inverting voltage amplifier having an input coupled to the single-ended voltage input of the differential stage and an output; and (b) a capacitor coupled between the output of the unity gain inverting voltage amplifier and the second single-ended output, the capacitor having a value substantially equal to the value of the parasitic capacitance.
Claim 18
Dependent Claim
105 words
A circuit as in claim 1 in which the supplying means comprises: (a) a first transistor having a control terminal coupled to a first source of supply voltage, a first controlled terminal coupled to the control terminal, and a second controlled terminal; (b) a second transistor having a control terminal coupled to the second controlled terminal of the first transistor, a first controlled terminal coupled to the control terminal, and a second controlled terminal coupled to the bias terminal of the differential stage; and (c) level shift means coupled between the second controlled terminal of the first transistor and a second source of supply voltage.
Claim 19
Dependent Claim
107 words
A circuit as in claim 18 in which the cancelling means comprises; (a) a first transistor having a control terminal coupled to a first source of supply voltage, a first controlled terminal coupled to the control terminal, and a second controlled terminal; (b) a second transistor having a control terminal coupled to the second controlled terminal of the first transistor, a first controlled terminal coupled to the control terminal, and a second controlled terminal coupled to the bias terminal of the differential stage; and (c) level shift means coupled between the second controlled terminal of the first transistor and the single-ended voltage input of the differential stage.
Claim 20
Dependent Claim
100 words
A circuit as in claim 1 in which the supplying means comprises: (a) a first resistor type current source having an input for receiving a reference current, an output, and a bias terminal coupled to a first source of supply voltage; (b) a second resistor type current source having an input, an output coupled to the bias terminal of the differential stage, and a bias terminal coupled to the output of the first resistor the current source; and (c) level shift means coupled between the input of the second resistor the current source and a second source of supply voltage.
Claim 21
Dependent Claim
32 words
A circuit as in claim 20 in which the supplying means further comprises means for supplying an additional bias tail current substantially equal to the bias tail current of the supplying means.
Claim 22
Dependent Claim
68 words
A circuit as in claim 21 in which the cancelling means comprises: (a) a resistor the current source having an input, an output coupled to the bias terminal of the differential stage, and a bias terminal for receiving the additional bias tail current; and (b) level shift means coupled between the input of the second resistor type current source and the single-ended voltage input of the differential stage.
Claim 23
Dependent Claim
105 words
A circuit as in claim 1 in which the supplying means comprises: (a) a first transistor having a control terminal coupled to a first source of supply voltage, a first controlled terminal coupled to the control terminal, and a second controlled terminal; (b) a second transistor having a control terminal coupled to a second controlled terminal of the first transistor, a first controlled terminal coupled to the control terminal, and a second controlled terminal coupled to the bias terminal of the differential stage; and (c) level shift means coupled between the second controlled terminal of the first transistor and a second source of supply voltage.
Claim 24
Dependent Claim
135 words
A circuit as in claim 23 in which the cancelling means comprises: (a) a first transistor having a control terminal coupled to the first source of supply voltage, a first controlled terminal coupled to the control terminal, and a second controlled terminal coupled to the single-ended voltage input of the differential stage; (b) a second transistor having a control terminal for receiving the single-ended voltage, and a first controlled terminal; (c) level shift means coupled between the first controlled terminal of the second transistor and the single-ended voltage input of the differential stage; and (d) a third transistor having a control terminal coupled to the bias terminal of the differential stage, a first controlled terminal coupled to the control terminal, and a second controlled terminal coupled to the first controlled terminal of the second transistor.
Claim 25
Dependent Claim
44 words
A circuit as in claim 1 in which one of the supplying means and cancelling means comprise at least one transistor biased in the active region for respectively providing the bias tail current to the differential stage and providing the corresponding cancelling current thereto.
Claim 26
Dependent Claim
14 words
A circuit as in claim 25 in which the transistor is a GaAs MESFET.
Claim 27
Dependent Claim
14 words
A circuit as in claim 25 in which the transistor is a silicon MOSFET.
Claim 28
Dependent Claim
15 words
A circuit as in claim 25 in which the transistor is a silicon bipolar transistor.
Claim 29
Dependent Claim
14 words
A circuit as in claim 25 in which the transistor is a GaAs MODFET.
Claim 30
Dependent Claim
15 words
A circuit as in claim 25 in which the transistor is a GaAs bipolar transistor.
Claim 31
Dependent Claim
16 words
A circuit as in claim 25 in which the transistor is fabricated in an integrated circuit.
Claim 32
Dependent Claim
84 words
In a differential stage having a single-ended voltage input, a differential current output, and a bias terminal for receiving a bias tail current supplied by means having a finite output impedance and an associated signal tail current, a method for converting a single-ended voltage into a balanced differential current, the method comprising: providing a signal current to the supplying means that is substantially equal to the signal tail current for cancelling the signal tail current supplied to the bias terminal of the differential stage.
Claim 33
Dependent Claim
63 words
A method as in claim 32 in which the step of providing a signal current to the supplying means comprises coupling means between the single-ended voltage input and the bias terminal of the differential stage having an impedance substantially equal to the output impedance of the providing means for cancelling the signal tail current supplied to the bias terminal of the differential stage.
Claim 34
Dependent Claim
29 words
A method as in claim 33 further comprising the step of AC coupling the cancelling means between the single-ended voltage input and the bias terminal of the differential stage.
Claim 35
Dependent Claim
46 words
A method as in claim 33 in which the step of providing a signal current comprises providing a signal current for cancelling the signal tail current within a first frequency band and a frequency dependent signal current to the supplying means within a second frequency band.
Claim 36
Dependent Claim
72 words
A circuit for converting a single-ended voltage into a differential current, the circuit comprising a differential stage having a single-ended voltage input (12), a differential current output and a bias terminal (16) coupled to a bias source for providing a biassing current, characterised by means coupling the single-ended voltage input (12) to the bias terminal (16) in such a manner as substantially to cancel the biassing current applied to the differential stage.
References Cited (Backward Citations)
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