EP0471380A1
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EP
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ATM switch
Assignee: Hitachi Ltd
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Filing: 1991-08-16
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Granted: —
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Expires: 2011-08-16
Abstract
Abstract An ATM switch including ECC encoder circuits (11-18) each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N + M) partial cell switches (30-39) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits (51-58) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells.
Inventors
- 👤 Yukio Nakano
- 👤 Takahiko Kozaki
- 👤 Shinobu Gohara
- 👤 Yoshihiro Ashi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 07:56
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L1/00; H04L1/004; H04L1/0041; H04L1/0078; H04L1/0085; H04L49/00; H04L49/15; H04L49/1515; H04L49/153; H04L49/1538; H04L49/1553; H04L49/25; H04L49/253; H04L49/255; H04L49/30; H04L49/3081; H04L49/309; H04L2012/5625; H04L2012/5627; H04L2012/5638; H04L2012/5646; H04L2012/5652; H04L2012/5678; H04L2012/5681
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
59 words
An ATM switch comprising: cell partitioning circuits (21-28) each for subdividing an ATM cell into N partial cells (N is an integer more than one) and for assigning an identical routing tag to the obtained partial cells; and N partial cell switches (30-37) for respectively routing the N partial cells in an independent fashion based on the routing tag.
Claim 2
Dependent Claim
59 words
An ATM switch comprising: cell partitioning circuits (21-28) each for subdividing an ATM cell into N partial cells (N is an integer more than one) and for assigning an identical routing tag to the obtained partial cells; and N partial cell switches (30-37) for respectively routing the N partial cells in an independent fashion based on the routing tag.
Claim 3
Dependent Claim
125 words
An ATM switch comprising: error correcting code (ECC) encoder circuits (11-18) each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto; cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells; (N + M) partial cell switches (30-39) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag; and ECC decoder circuits (51-58) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells.
Claim 4
Dependent Claim
125 words
An ATM switch comprising: error correcting code (ECC) encoder circuits (11-18) each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto; cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells; (N + M) partial cell switches (30-39) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag; and ECC decoder circuits (51-58) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells.
Claim 5
Dependent Claim
43 words
An ATM switch according to Claim 2, wherein each of the N partial cells generated from the information field of the ATM cell and the M partial cells created from the check symbol field thereof comprises an identical number of bits (Fig. 5).
Claim 6
Dependent Claim
47 words
An ATM switch according to Claim 2, wherein when the partial cell includes b bits, the ECC is a code for which an error correction is conducted in the unit of a symbol constituted with j bits (j = b/m, where m is a divisor of b).
Claim 7
Dependent Claim
49 words
An ATM switch according to Claim 4, wherein the ECC for which an error correction is accomplished in the unit of a symbol constituted with j bits (j = b/m, where m is a divisor of b) is a code existing on a Galois field GF (2 i ).
Claim 8
Dependent Claim
23 words
An ATM switch according to Claim 5, wherein the code existing on a Galois field GF (2 j ) is a Read-Solomon code.
Claim 9
Dependent Claim
24 words
An ATM switch according to Claim 6, wherein the Read-Solomon code is a Read-Solomon code for which a one-symbol error correction can be achieved.
Claim 10
Dependent Claim
127 words
An ATM switch comprising: error detection code encoder circuits (81-88) each for generating, for an ATM cell as an information symbol, a check symbol of an error detection code and for adding the check symbol thereto; cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells; (N + M) partial cell switches (30-38) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag; and error detection circuits (101-108) for receiving the (N + M) partial cells thus routed and for achieving an error detection on the received partial cells.
Claim 11
Dependent Claim
127 words
An ATM switch comprising: error detection code encoder circuits (81-88) each for generating, for an ATM cell as an information symbol, a check symbol of an error detection code and for adding the check symbol thereto; cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells; (N + M) partial cell switches (30-38) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag; and error detection circuits (101-108) for receiving the (N + M) partial cells thus routed and for achieving an error detection on the received partial cells.
Claim 12
Dependent Claim
17 words
An ATM switch according to Claim 8, wherein the error detection code is a parity check code.
Claim 13
Dependent Claim
43 words
An ATM switch according to Claim 8, wherein each of the N partial cells generated from the information field of the ATM cell and the M partial cells created from the check symbol field thereof comprises an identical number of bits (Fig. 7).
Claim 14
Dependent Claim
93 words
An ATM switch comprising: cell partitioning circuits (41-48; 310-318, ..., 380-388) each for subdividing an ATM cell into N partial cells and for assigning an identical routing tag to the obtained partial cells; code assigning circuits (310-318, ..., 380-388) for assigning an identical code to the N partial cells; N switches (30-37) for respectively routing the N partial cells in an independent fashion based on the routing tag; and matching detection circuits (131 to 138) for receiving the N partial cells thus routed and for detecting a matching of the codes assigned thereto.
Claim 15
Dependent Claim
93 words
An ATM switch comprising: cell partitioning circuits (41-48; 310-318, ..., 380-388) each for subdividing an ATM cell into N partial cells and for assigning an identical routing tag to the obtained partial cells; code assigning circuits (310-318, ..., 380-388) for assigning an identical code to the N partial cells; N switches (30-37) for respectively routing the N partial cells in an independent fashion based on the routing tag; and matching detection circuits (131 to 138) for receiving the N partial cells thus routed and for detecting a matching of the codes assigned thereto.
Claim 16
Dependent Claim
166 words
An ATM switch control method of controlling an ATM switch including error correcting code (ECC) encoder circuits (11-18) each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells, (N + M) partial cell switches (30-39) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits (51-58) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells comprising: a step of resetting said (N + M) switches when an error correction or detection is achieved with a frequency not below a preset frequency in either one of said ECC decoder circuits.
Claim 17
Dependent Claim
166 words
An ATM switch control method of controlling an ATM switch including error correcting code (ECC) encoder circuits (11-18) each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells, (N + M) partial cell switches (30-39) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits (51-58) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells comprising: a step of resetting said (N + M) switches when an error correction or detection is achieved with a frequency not below a preset frequency in either one of said ECC decoder circuits.
Claim 18
Dependent Claim
166 words
An ATM switch control method of controlling an ATM switch including error detection code encoder circuits (81-88) each for generating, for an ATM cell as an information symbol, check symbol of an error detection code and for adding the check symbol thereto, cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells, (N + M) partial cell switches (30-38) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and error detection circuits (101-108) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells comprising: a step of resetting said (N + M) switches when an error detection is achieved with a frequency not less than a preset frequency in either one of said error detection circuits.
Claim 19
Dependent Claim
166 words
An ATM switch control method of controlling an ATM switch including error detection code encoder circuits (81-88) each for generating, for an ATM cell as an information symbol, check symbol of an error detection code and for adding the check symbol thereto, cell partitioning circuits (21-28) each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells, (N + M) partial cell switches (30-38) for respectively routing the (N + M) partial cells in an independent fashion based on the routing tag, and error detection circuits (101-108) for receiving the (N + M) partial cells thus routed and for achieving an error correction on the received partial cells comprising: a step of resetting said (N + M) switches when an error detection is achieved with a frequency not less than a preset frequency in either one of said error detection circuits.
Claim 20
Dependent Claim
132 words
An ATM switch control method of controlling an ATM switch including cell partitioning circuits (41-48; 310-318, ..., 380-388) each for subdividing an ATM cell into N partial cells and for assigning an identical routing tag to the obtained partial cells, code assigning circuits (310-318, ..., 380-388) for assigning an identical code to the N partial cells, N switches (30-37) for respectively routing the N partial cells in an independent fashion based on the routing tag, and matching detection circuits (131 to 138) for receiving the N partial cells thus routed and for detecting a matching of the codes assigned thereto comprising: a step of resetting said N switches when a code mismatching error is detected with a frequency not less than a preset frequency in either one of said matching detection circuits.
Claim 21
Dependent Claim
132 words
An ATM switch control method of controlling an ATM switch including cell partitioning circuits (41-48; 310-318, ..., 380-388) each for subdividing an ATM cell into N partial cells and for assigning an identical routing tag to the obtained partial cells, code assigning circuits (310-318, ..., 380-388) for assigning an identical code to the N partial cells, N switches (30-37) for respectively routing the N partial cells in an independent fashion based on the routing tag, and matching detection circuits (131 to 138) for receiving the N partial cells thus routed and for detecting a matching of the codes assigned thereto comprising: a step of resetting said N switches when a code mismatching error is detected with a frequency not less than a preset frequency in either one of said matching detection circuits.
References Cited (Backward Citations)
EP0108655A1
Cited
WO1988007298A1
Cited
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