EP0469934A2
Expired / Lapsed
EP
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Semiconductor memory device and method of operation thereof
Assignee: Hitachi Ltd
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Filing: 1991-08-02
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Granted: —
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Expires: 2011-08-02
Abstract
Abstract A semiconductor memory device has a plurality of memory cells (351,352,353,354) in an array, into which the memory cells (351,352,353,354) data is writable, and which can subsequently be read. Each memory cell has a switching element (111) with one terminal connected to a bit line (120) of the array another terminal connected to at least one ferroelectric capacitor (112,113,114,115), and a control terminal connected to a word line (121). The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor (427) and a capacitor (428) other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality (112,113,114,115) of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.
Inventors
- 👤 Ryuichi Saito
- 👤 Hidekatsu Onose
- 👤 Yutaka Kobayashi
- 👤 Michio Ohue
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 07:31
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C11/56; G11C11/5657; H; H10; H10B; H10B12/00; H10B12/30; H10B53/00; G11C16/00; G11C16/02; G11C16/06; G11C16/08; G11C8/00; G11C8/14
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
150 words
A method of operating a semiconductor memory device; said semiconductor memory device having at least one memory cell, said at least one memory cell having at least one ferroelectric capacitive element, said at least one ferroelectric capacitive element having first and second polarization states and is switchable therebetween by respective first and second voltages applied across said ferroelectric switching element; wherein said first voltage is applied across said ferroelectric capacitive element, thereby to cause said ferroelectric capacitive element to be in said first state; characterised in that: a further voltage is applied across said ferroelectric capacitive element so as to cause said ferroelectric capacitive element to change from said first state to a further state, said further voltage being different from that corresponding to said second state; and the change of polarization across said at least one ferroelectric capacitive element between said first state and said further state is measured.
Claim 2
Dependent Claim
81 words
A method according to claim 1, wherein said at least one memory cell has a switching element having first second and control terminals, and said first terminal of said switching element is connected to a first terminal of said ferroelectric capacitive element, and said step of measuring the change in polarization across said ferroelectric capacitive element comprises applying a first signal to said control terminal of said switching element and measuring the voltage at said second terminal of said switching element.
Claim 3
Dependent Claim
131 words
A method according to claim 1 or claim 2, wherein said memory device has a further memory cell having at least one further ferroelectric capacitive element; and wherein said method further includes: apply a predetermined voltage across said at least one further ferroelectric capacitive element, thereby to cause said at least one further ferroelectric capacitive element to be in a predetermined state; applying said further voltage across said further ferroelectric capacitive element; measuring the change in polarization across said at least one further ferroelectric capacitive element due to said further voltage; and comparing said change in polarization of said at least one ferroelectric capacitive element and said change in polarization of said at least one further ferroelectric capacitive element, thereby to determine whether said first state corresponds to said predetermined state.
Claim 4
Independent Claim
34 words
A method according to any one of the preceding claims, further including: re-applying said first voltage across said ferroelectric capacitive element, thereby to cause said ferroelectric capacitive element to return to said first state.
Claim 5
Independent Claim
44 words
A method according to any one of the preceding claims, wherein said ferroelectric capacitive element is initially in said second state and said first voltage is such as to cause said ferroelectric capacitive element to change from said second state to said first state.
Claim 6
Dependent Claim
144 words
A semiconductor memory having: a) at least one memory cell having at least one ferroelectric capacitive element, said at least one ferroelectric capacitive element having first and second polarization states and being switchable therebetween by respective first and second voltages; and b) a control circuit for applying said first voltage across said ferroelectric capacitive element, thereby to cause said ferroelectric capacitive element to be in said first state; characterised in that: the control circuit is arranged to apply a further voltage across said ferroelectric capacitive element so as to cause said ferroelectric capacitive element to change from said first state to a further state, said further voltage being different from that corresponding to said second state; and the memory includes measuring means for measuring the change of polarization across said at least one ferroelectric capacitive element between said first state and said further state.
Claim 7
Dependent Claim
43 words
A memory device according to claim 6, wherein said at least one memory cell has a switching element having first second and control terminals, and said first terminal of said switching element is connected to a first terminal of said ferroelectric capacitive element.
Claim 8
Dependent Claim
118 words
A memory device according to claim 6 or claim 7, having a further memory cell having at least one further ferroelectric capacitive element; wherein said control circuit is arranged to apply a predetermined voltage across said at least one further ferroelectric capacitive element, thereby to cause said at least one further ferroelectric capacitive element to be in a predetermined state, and apply said further voltage across said further ferroelectric capacitive element; and wherein said measuring means is arranged to compare said change in polarization of said at least one ferroelectric capacitive element and said change in polarization of said at least one further ferroelectric capacitive element, thereby to determine whether said first state corresponds to said predetermined state.
Claim 9
Dependent Claim
34 words
A memory device according to any one of claims 6 to 8, having a plurality of said ferroelectric capacitive elements, and said plurality of ferroelectric capacitive elements have a first terminal electrically connected together.
Claim 10
Dependent Claim
36 words
A memory device according to claim 9, wherein said plurality of ferroelectric capacitive elements have a second terminal electrically connected together and at least two of said plurality of ferroelectric capacitive elements have different ferroelectric properties.
Claim 11
Dependent Claim
47 words
A memory device according to any one of claims 6 to 10, wherein said at least one memory cell has at least one further capacitive element being other than a ferroelectric capacitive element and said at least one ferroelectric capacitive element have a terminal electrically connected together.
Claim 12
Dependent Claim
63 words
A memory device according to any one of claims 6 to 10, wherein said at least one memory cell has means for establishing electric fields in a predetermined direction across the or each ferroelectric capacitive element in response to said first and further voltages, and the polarization axis of said at least one ferroelectric capacitive element is substantially parallel to said predetermined direction.
Claim 13
Dependent Claim
47 words
A memory device according to any one of claims 6 to 12, wherein the or each ferroelectric capacitive element has: a body of ferroelectric material having opposite surfaces; an insulation layer on each of said opposite surfaces; and a conductive layer on each of said insulation layers.
Claim 14
Dependent Claim
82 words
A semiconductor memory device having at least one memory cell, said at least one memory cell comprising: at least one switching element having first, second and control terminals; and a plurality of capacitive elements each having a first terminal connected to said first terminal of said switching element; wherein at least one of said plurality of capacitive elements is a ferroelectric capacitive element; characterised in that: at least another of said plurality of capacitive elements is other than a ferroelectric capacitive element.
Claim 15
Dependent Claim
34 words
A memory device according to claim 14, wherein the capacitance of said at least of one said plurality of capacitive elements is greater than said at least another of said plurality of capacitive elements.
Claim 16
Dependent Claim
25 words
A memory device according to claim 14 or claim 15, wherein more than one of said plurality of capacitive elements is a ferroelectric capacitive element.
Claim 17
Independent Claim
198 words
A method of operating a semiconductor memory device, wherein a) said memory device has at least one memory cell, said at least one memory cell comprising: (i) at least one switching element having first, second and control terminals; and (ii) a plurality of capacitive elements each having a first terminal connected to said first terminal of said switching element; wherein at least one of said plurality of capacitive elements is a ferroelectric capacitive element, and at least another of said plurality of capacitive elements is other than a ferroelectric capacitive element; and b) said method comprises: maintaining constant the voltage of a second terminal of said at least another of said plurality of capacitive elements at a predetermined voltage; applying a first voltage to said second terminal of said at least one of said plurality of capacitive elements, thereby to cause said at least one of said plurality of capacitive elements to be in a first state; applying a second voltage to said second terminal of said at least one of said plurality of capacitive elements; and measuring the charge in polarization of said at least one of said plurality of capacitive elements due to said second voltage.
Claim 18
Dependent Claim
54 words
A method according to claim 17, wherein the measuring the change in polarization of said at least one of said plurality of capacitive elements includes applying a signal to said control terminal of said switching element, detecting the further voltage at said second terminal thereof, and comparing said further voltage with said predetermined voltage.
Claim 19
Independent Claim
196 words
A method of operating a semiconductor memory device having at least one memory cell, said at least one memory cell comprising: at least one switching element having first, second and control terminals; and a plurality of capacitive elements each having a first terminal connected to said first terminal of said switching element; characterised in that: at least two of said plurality of capacitive elements being ferroelectric capacitive elements; and the method comprises: establishing respective first operating states, for each of said capacitive elements, said respective first operating states of said at least two of said plurality of capacitive elements corresponding to a respective first polarization; and selectively applying a first voltage to a second terminal of a selected at least one of said capacitive elements and a second voltage, different from said first voltage, to a second terminal of said capacitive elements other than said selected at least one of said capacitive elements, thereby to change said selected one of said capacitive elements to a second operating state corresponding to a second polarization, and to hold said capacitive elements other than said selected at least one of said capacitive elements in said respective first operating state.
Claim 20
Dependent Claim
37 words
A method according to claim 19, wherein the polarization of said selected at least one of said capacitive elements is investigated after said at least one of said capacitive elements has been changed to said second state.
Claim 21
Dependent Claim
36 words
A method according to claim 20, wherein said polarization is investigated by applying a signal to said control terminal of said switching element, and detecting the further voltage at said second terminal of said switching element.
Claim 22
Dependent Claim
139 words
A method according to claim 20 or claim 21, wherein said memory device has a further memory cell having at least one further ferroelectric capacitive element, and wherein said method further includes: applying a predetermined voltage across said at least one further ferroelectric capacitive element, thereby to cause said at least one further ferroelectric capacitive element to be in a predetermined state; applying said first voltage to a terminal of said at least one further ferroelectric capacitive element; measuring the change in polarization across said at least one further ferroelectric capacitive element due to said first voltage; and comparing said change in polarization of said selected at least one of said capacitive elements and said charge in polarization of said at least one further ferroelectric capacitive element, thereby to determine whether said second state corresponds to said predetermined state.
Claim 23
Dependent Claim
211 words
A semiconductor memory device comprising: a) at least one memory cell having at least one switching element, said at least one switching element having first second and control terminals, and a plurality of capacitive elements, each of said plurality of capacitive elements having a first terminal connected to said first terminal of said switching element, and at least two of said plurality of capacitive elements being ferroelectric capacitive elements; and b) control means for: establishing respective first operating states, for each of said capacitive elements, said respective first operating states of said at least two of said plurality of capacitive elements corresponding to a respective first polarization; characterised in that: said control means is arranged selectively to apply a first voltage to a second terminal of a selected at least one of said capacitive elements and a second voltage, different from said first voltage, to a second terminal of said capacitive elements other than said selected at least one of said capacitive elements; whereby said control means is arranged to change said selected one of said capacitive elements to a second operating state corresponding to a second polarization, and to hold said capacitive elements other than said selected at least one of said capacitive elements in said respective first operating state.
Claim 24
Dependent Claim
29 words
A memory device according to claim 23, wherein more than one of said plurality of capacitive elements of said at least one memory cell is a ferroelectric capacitive element.
Claim 25
Dependent Claim
21 words
A memory device according to claim 24, wherein said ferroelectric capacitive elements of said at least one memory cell are stacked.
Claim 26
Dependent Claim
25 words
A memory device according to claim 25, wherein said ferroelectric capacitive elements are stacked above said switching element of said at least one memory cell.
Claim 27
Dependent Claim
109 words
A memory device according to any one of claims 23 to 26 having a plurality of said memory cells, wherein a second terminal of a first one of said plurality of capacitive elements of a first one of said memory cells is connected to a second terminal of a first one of said plurality of capacitive elements of a second one of said memory cells, and a second terminal of said first one of said plurality of capacitive elements of said first one of said memory cells is connected to a second terminal of one of said plurality of capacitive elements of a third one of said memory cells.
Claim 28
Dependent Claim
66 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element wherein the capacitive element of each said memory cell has a ferroelectric body; characterised in that: the polarization axis of said body is substantially parallel to said predetermined direction.
Claim 29
Dependent Claim
31 words
A semiconductor memory device according to claim 28 wherein said ferroelectric body comprises a plurality of ferroelectric crystals and each of said crystals has a surface parallel to said polarization axis.
Claim 30
Dependent Claim
73 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element wherein said at least one capacitive element of each said memory cell has a ferroelectric body; characterised in that: at least 80% of said ferroelectric body has a polarization axis within 5% of said predetermined axis.
Claim 31
Dependent Claim
84 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element wherein the capacitive element of each said memory cell has a ferroelectric body; characterised in that: said ferroelectric body has a plurality of ferroelectric crystals each having a polarization axis and each of said crystals has a surface parallel to the polarization axis of the corresponding crystal.
Claim 32
Dependent Claim
45 words
A semiconductor memory device having at least one memory cell, each memory cell having at least one ferroelectric capacitive element; characterised in that: said ferroelectric capacitive element has the polarization axes thereof arranged randomly such that the ferroelectric capacitive element has an isotropic dielectric characteristic.
Claim 33
Dependent Claim
32 words
A ferroelectric capacitive element having: a body of ferroelectric material having opposite surfaces; an insulation layer on each of said opposite surfaces; and a conductive layer on each of said insulation layers.
Claim 34
Dependent Claim
87 words
A semiconductor memory device having at least one memory cell, said at least one memory cell comprising: at least one switching element having first, second and control terminals; and a plurality of capacitive elements each having one terminal connected to said first terminal of said switching element; wherein at least two of said plurality of capacitive elements are ferroelectric capacitive element; characterised in that: terminals of said capacitive elements are electrically connected together, and said at least two of said ferroelectric capacitive elements have different ferroelectric characteristics.
Claim 35
Independent Claim
99 words
A method of operating a semiconductor memory device; said semiconductor memory device having a plurality of memory cells, each memory cell having at least one switching element having first, second and control terminals and at least one ferroelectric capacitive element having a first terminal connected to said first terminal of said switching element; characterised in that: said method comprises controlling voltages applied to said second and control terminals of said switching element and a second terminal of said ferroelectric capacitive element such as to establish a selected one of at least three polarity states of said ferroelectric capacitive element.
References Cited (Backward Citations)
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