EP0468823A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Computer data routing system
Assignee: Dell USA LP
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Filing: 1991-07-29
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Granted: —
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Expires: 2011-07-29
Abstract
Abstract A digital computer system includes an interface for routing data which permits the transfer of data between mismatched devices. The computer system comprises a processor, memory and an interconnecting data bus, all configured to handle data units of a first data width. Also connected to the data bus is at least one I/O device configured to handle data units of a second data width. By adjusting the width of the data being transferred to match the width of the receiving device or bus, data may be transferred between devices of differing width. To adjust the width, control means are provided which modify the route along which data bytes are transferred based upon the width of the transferring and receiving devices and the direction of transfer are provided.
Inventors
- 👤 Charles R. Zeller
- 👤 Terry J. Parks
- 👤 Michael D. Durkin
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-10 01:59
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F13/38; G06F13/40; G06F13/4004; G06F13/4009; G06F13/4018
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
139 words
A bus interface circuit which is capable of transferring information between a first information bus and a second information bus, including: an input stage having means for connecting it to the first information bus, an output stage having means for connecting it to the second information bus, a routing network, connecting the input and output stages, which is capable of handling information from the input stage as a plurality of blocks, of conveying the blocks to the output stage, and of assembling the blocks into n-block groups, in the order of the significance of the blocks in a unit of information, for transmission to an n-block wide second information bus, where n = 1 is included, and control means for controlling the routing network in accordance with instructions indicating the relative widths of the first and second information buses.
Claim 2
Dependent Claim
71 words
A bus interface circuit as claimed in claim 1, wherein the output stage includes output storage means capable of storing a plurality of blocks of information corresponding to a maximum width of the second information bus, and the routing network includes a first plurality of multiplexers which are capable of supplying blocks of information to the storage means in the order of significance of the blocks in a unit of information.
Claim 3
Dependent Claim
79 words
A bus interface circuit as claimed in claim 2, wherein the control means includes an output control means capable of controlling the configuration of the routing network and the loading of the storage means in accordance with the width of the second information bus, in order to effect the supply of blocks of information to the storage means in the order of significance of the blocks in a unit of information having the width of the second information bus.
Claim 4
Dependent Claim
64 words
A bus interface circuit as claimed in any one of claims 1 to 3, wherein the input stage includes input storage means capable of storing a plurality of blocks of information corresponding to a maximum width of the first information bus, and the routing network includes a second plurality of multiplexers which are capable of selecting and transmitting the stored information block by block.
Claim 5
Dependent Claim
42 words
A bus interface circuit as claimed in claim 4, wherein the routing network includes an intermediate information bus on which, in operation it provides blocks of information from the input stage and obtains blocks of information for transmission to the output stage.
Claim 6
Dependent Claim
82 words
A bus interface circuit as claimed in claim 5, wherein the control means includes an input control means capable of controlling the configuration of the routing network and the selection of stored information from the input storage means in accordance with the width of the intermediate information bus, in order to effect the supply of blocks of information to the intermediate bus in the order of significance of the blocks in a unit of information having the width of the intermediate bus.
Claim 7
Dependent Claim
21 words
A bus interface circuit as claimed in any one of claims 1 to 6, wherein each block is an information byte.
Claim 8
Dependent Claim
27 words
A computer system including a bus interface circuit as claimed in claim 6 or claim 7, wherein an input-output circuit is connected to the intermediate information bus.
References Cited (Backward Citations)
No citation records indexed.
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