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EP0465079A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method and device for assigning I/O address in data processing apparatus

Assignee: Sanyo Electric Co Ltd
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Filing: 1991-06-24
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Granted: —
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Expires: 2011-06-24
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Abstract

Abstract An I/O address assigning device in a data processing apparatus having a standard port provided in the main unit for connecting the main unit to an I/O address assigning device so as to increase the function of the data processing apparatus and an I/O connecting portion for connecting an additional board provided with an I/O port therein. The I/O address assigning device comprises a control means for disabling the I/O port in the main unit for operation in order to prevent conflict of the I/O port in the main unit and on an additional board which have the same address, a detecting means for detecting the preset I/O address of the additional I/O port in the state in which the I/O port in the main unit is disabled, and an address assigning means for assigning an I/O address different from the preset address of the additional I/O port which is detected by the detecting means to the I/O port in the main unit. When the I/O address of the standard port on the additional board which is detected by the detecting means in the state in which the standard port in the main unit is disabled is the same as the I/O address of the standard port in the main unit, an I/O address different from that of the standard port on the additional board is assigned to the standard port on the main unit.

Inventors

  • 👤 Minoru Kimura

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-26 15:47
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/06; G06F12/0646; G06F12/0684

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 115 words
An I/O address assigning device in a data processing apparatus having a first I/O port for connecting the data processing apparatus to an I/O device and an I/O connecting portion for connecting an additional I/O port to the data processing apparatus, the I/O address assigning device comprising; a control means for disabling the first I/O port for operation; a detecting means for detecting the preset I/O address of the additional I/O port in the state in which the first I/O port is disabled; and an assigning means for assigning an I/O address different from the preset I/O address of the additional I/O port which is detected by the detecting means to the first I/O port.
Claim 2
Dependent Claim 56 words
An I/O address assigning device in a data processing apparatus according to Claim 1, wherein the control means includes: (a) first register in which data designating a disabled state is set; and (b) a means for disabling a chip selecting signal to be supplied the I/O port in accordance with the output of the first register.
Claim 3
Dependent Claim 43 words
An I/O address assigning device in a data processing apparatus according to Claim 1 or 2, wherein the detecting means writes or reads data at a predetermined address so as to judge whether or not an I/O port exists at the predetermined address.
Claim 4
Dependent Claim 80 words
An I/O address assigning device in a data processing apparatus according to Claim 1, 2 or 3, wherein the assigning means includes: a) a second register in which information about which of a plurality of I/O addresses is selected is set; and b) an address decoder for inputting an address signal and outputting a chip selecting signal to the first I/O port when the input address is an I/O address which corresponds to the information set in the second register.
Claim 5
Dependent Claim 35 words
An I/O address assigning device in a data processing apparatus according to any preceding claim, wherein the control means, the detecting means and the assigning means are started when the power source is turned on.
Claim 6
Dependent Claim 41 words
An I/O address assigning device in a data processing apparatus according to any preceding claim, wherein the first I/O ports and the additional I/O ports are standard ports which are provided with a plurality of I/O addresses to be assigned thereto.
Claim 7
Dependent Claim 114 words
An I/O address assigning device in a data processing apparatus according to Claim 6, wherein the additional I/O port includes a third register which enables writing and reading; and the detecting means includes: a reading and writing means for writing and reading data at the predetermined I/O address; and a first identification detecting means for judging whether of not the data written by the reading and writing means is identified with data read by the reading and writing means; and judges that the I/O address at which the data is written and read is the I/O address set at the additional I/O port when the identification is detected by the first identification detecting means.
Claim 8
Dependent Claim 47 words
An I/O address assigning device in a data processing apparatus according to Claim 7, wherein the assigning means assigns the I/O address at which the data is written and read to the first I/O port when the identification is not detected by the first identification detecting means.
Claim 9
Dependent Claim 106 words
An I/O address assigning device in a data processing apparatus according to Claim 6, wherein the additional I/O port includes a fourth register in which a predetermined value is set when the power source is turned on; and the detecting means includes: a reading means for reading data at the predetermined I/O address; and a second identification detecting means for judging whether or not the read data is identified with the predetermined value; and judges that the I/O address at which the data is read is the I/O address set at the additional I/O port when the identification is detected by the second identification detecting means.
Claim 10
Dependent Claim 45 words
An I/O address assigning device in a data processing apparatus according to Claim 9, wherein the assigning means assigns the I/O address at which the data is read to the first I/O port when the identification is not detected by the second identification detecting means.
Claim 11
Independent Claim 103 words
A method of addressing an I/O address in a data processing apparatus having a first I/O port for connecting the data processing apparatus to an I/O device and an I/O connecting portion for connecting an additional I/O port to the data processing apparatus comprising the steps of: disabling the first I/O port for operation: detecting the preset I/O address of the additional I/O port in the state in which the first I/O port is disabled; and assigning an I/O address different from the preset I/O address of the additional I/O port which is detected by the detecting means to the first I/O port.

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