Mask-programmable microprocessors

Claim 1

A mask-programmable microprocessor comprising a read only memory storing the program of the microprocessor and a program counter for sequentially addressing the read only memory to read the program therefrom, the microprocessor being provided with at least one patch implementation means for use in the event that an incorrect program fragment is discovered in the read only memory after programming thereof, said patch implementation means comprising an additional memory into which an additional program fragment can be written, and control means responsive to the program counter reaching an address earlier in sequence than that of the incorrect program fragment to cause the program counter to bypass the incorrect program fragment by addressing the additional memory to read out the additional program fragment in place of the incorrect program fragment, wherein the control means comprises a first address register for containing said earlier address, a second address register for containing the address of the additional program fragment and comparison means responsive to the program counter reaching the address in the first address register to load the address in the second address register into the program counter in place thereof, whereby the program counter addresses the additional memory instead of the read only memory, said additional program fragment being arranged to replace said incorrect program fragment and then reset the program counter to an address of the read only memory beyond that of the incorrect code fragment from which the program stored in the read only memory is desired to recommence operation.