EP0458127A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Translation of multiple virtual pages upon a TLB miss
Assignee: International Business Machines Corp
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Filing: 1991-05-07
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Granted: —
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Expires: 2011-05-07
Abstract
Abstract Apparatus, and accompanying methods for use therein, for translating virtual page addresses in one address space, e.g. virtual, to page addresses in a second address space, e.g. real, and specifically for increasing the speed of such translations by translating multiple contiguous virtual page addresses upon the occurrence of a miss in a translation lookaside buffer (TLB). In response to a TLB miss, the address of each virtual page in a pre-defined block of, e.g. four, contiguous virtual pages, is separately translated through segment and/or page table lookup operations to yield corresponding page frame addresses. The virtual and corresponding page frame addresses for this block are then stored within a single TLB entry. Inasmuch as successive virtual page addresses can be constructed through simple incrementation of a starting virtual page address for this block, a TLB entry contains the first virtual page address for the block followed by the separate page frame address, and its associated invalid and page protection bit fields, for each of the contiguous virtual pages in that block. Since segment and block values are the same for all the page frame addresses in each block, these values are only stored once within the corresponding TLB entry for that block.
Inventors
- 👤 Lishing Liu
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 14:35
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027; G06F2212/00; G06F2212/65; G06F2212/654; G06F2212/68; G06F2212/684
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
100 words
In a digital computer, a method for use in translating an incoming memory address in a first address space into a corresponding memory address in a second address space comprising the steps of: translating, in response to a miss in a translation lookaside buffer (TLB), a plurality of successive contiguous page addresses in a first address space into corresponding page addresses in a second address space, said plurality of page addresses in said first address space containing a page address of said incoming memory address; and storing said plurality of page addresses in said second address space in the TLB.
Claim 2
Dependent Claim
54 words
The method as in claim 1 wherein said storing step comprises the steps of: creating a TLB entry containing a first one of said plurality of page addresses in said first address space and each of said plurality of page addresses in said second address space; and inserting said TLB entry into the TLB.
Claim 3
Dependent Claim
26 words
The method as in claim 1 or 2 wherein said first address space is virtual address space and said second address space is real address space.
Claim 4
Dependent Claim
239 words
In a digital computer, a method for use in translating an incoming virtual memory address into a corresponding real memory address comprising the steps of: accessing a translation lookaside buffer (TLB) comprising: searching the TLB, in response to an incoming virtual page address contained in an incoming virtual memory address, for a TLB entry that contains real page addresses for a block of corresponding contiguous virtual page addresses containing said incoming virtual page address; generating, in response to said searching step, a TLB miss in the event said TLB entry does not exist in the TLB; and determining, in response to said searching step and the existence of said TLB entry, whether one of said real page addresses stored therein and corresponding to said incoming virtual page address is valid; and, if valid, reading said one real page address from said TLB entry as a corresponding translated real page address, otherwise generating a TLB miss; and updating the TLB, in response to said TLB miss, comprising: translating a plurality of successive contiguous virtual page addresses into corresponding real page addresses, said plurality of virtual page addresses containing said incoming virtual page address and forming the block of said virtual page addresses; creating a new TLB entry for said block and containing a first one of said plurality of virtual page addresses and each of said plurality of real page addresses; and inserting said new TLB entry into the TLB.
Claim 5
Dependent Claim
49 words
The method as in claim 3 or 4 wherein said creating step further comprises the step of incorporating within said entry a separate bit for each one of said real page addresses, wherein said bit indicates whether a corresponding one of said real page addresses is valid or not.
Claim 6
Dependent Claim
32 words
The method as in claim 4 or 5 wherein the first one of said virtual pages lies on a partition of a pre-defined block of virtual page addresses in a page table.
Claim 7
Dependent Claim
16 words
The method as in claim 6 wherein said block comprises four successive contiguous virtual page addresses.
Claim 8
Dependent Claim
39 words
The method as in claim 5, 6 or 7 wherein said TLB entry further comprises a block index field for identifying a block address for the first one of said plurality of virtual page addresses within said page table.
Claim 9
Dependent Claim
35 words
The method as in claim 8 wherein said TLB entry further comprises segment table origin and segment index fields for respectively identifying an origin of a segment table and a particular segment table entry therein.
Claim 10
Dependent Claim
39 words
The method as in claim 8 or 9 wherein said TLB entry insertion step comprises the step of hashing the TLB entry into the TLB through values of the segment and block index fields contained in the TLB entry.
Claim 11
Independent Claim
135 words
The method as in anyone of claims 6 to 10 wherein said translating step further comprises the steps of: first translating the first one of said plurality of virtual page addresses in said block through appropriate entries in both a segment table and the page table to yield a first entry in said page table and, from said first entry, obtaining a corresponding one of said plurality of real page addresses; and second translating a second one and each successive remaining one of said plurality of virtual page addresses in said block into corresponding ones of said plurality of real page addresses by accessing, from the page table, successive contiguous entries following said first page table entry and obtaining from each such successive entry a remaining corresponding one of said plurality of real page addresses.
Claim 12
Dependent Claim
108 words
The method as in claim 11 wherein said first translating step comprises the steps of: first accessing the segment table, in response to a segment table origin address and a value of a segment index present in the virtual memory address, to provide therefrom a segment table entry; reading a page table origin address from said segment table entry; second accessing the page table, in response to said page table origin address and a value of a page index present in the virtual memory address, in order to provide therefrom said first page table entry; and reading said first real page address from said first page table entry.
Claim 13
Dependent Claim
143 words
The method of claim 3 or anyone of claims 4 to 12 further comprising the steps of: searching the TLB, in response to an incoming virtual page address contained in the incoming virtual memory address, for a specific TLB entry that contains real page addresses for a block of corresponding contiguous virtual page addresses containing said incoming virtual page address; generating, in response to said searching step, a TLB miss in the event said specific TLB entry does not exist in the TLB; and determining, in response to said searching step and the existence of said specific TLB entry, whether one of said real page addresses stored therein and corresponding to said incoming virtual page address is valid; and, if valid, reading said one real page address from said TLB entry as a corresponding translated real page address, otherwise generating a TLB miss.
Claim 14
Dependent Claim
55 words
The method as in claim 13 further comprising the step of forming the real memory address by concatenating said one real page address with a value of a byte index field from said incoming virtual memory address, wherein said real memory address contains said one real page address followed by said byte index field value.
Claim 15
Dependent Claim
45 words
In a digital computer, apparatus for use in translating an incoming memory address in a first address space into a corresponding memory address in a second address space, characterized in that it performs preferably a method as in anyone of the claims 1 to 14.
References Cited (Backward Citations)
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