Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
106 words
Impedance synthesis multiple loop using filtering means in association with a common loop and with separate DC and AC loop parts, characterized in that said filtering means include a transducer fed from the common loop part and with an input stage (A1) cascaded with an output stage (A2), an overall negative feedback loop (Y4) extending from the output of the output stage towards the input of the input stage and one of said stages providing to the AC loop part an output signal excluding low frequency components such as DC the latter appearing only at the output of the other stage feeding the DC loop part.
Claim 2
Dependent Claim
26 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that said input stage provides the output signal excluding low frequency components such as DC.
Claim 3
Dependent Claim
92 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that said input stage includes a first operational amplifier (A1) with a first admittance (Y3) between its output and its inverting input, said output being coupled through a second admittance (Ya) to the invertig input of a second operational amplifier (A2) with a third admittance (Yb) between its output and its inverting input, and a fourth admittance (Y4) coupling the output of the second operational amplifier to the non-inverting input of the first operational amplifier to provide said negative feedback loop.
Claim 4
Dependent Claim
19 words
Impedance synthesis multiple loop as claimed in claim 3, characterized in that said first and fourth admittances are resistive.
Claim 5
Dependent Claim
29 words
Impedance synthesis multiple loop as claimed in claims 2 and 4, characterized in that said second admittance is resistive and said third admittance is frequency dependent, e.g. a capacitance.
Claim 6
Dependent Claim
67 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that it is part of a telecommunication line circuit including a Herter bridge with a first pair of terminals (v'2, v'1) coupled to a bidirectional two wire line, a second pair of terminals (v1, v2) coupled to said separate DC and AC loop parts and a third pair of terminals (e) coupled to said input stage.
Claim 7
Dependent Claim
111 words
Impedance synthesis multiple loop as claimed in claims 3 and 6, characterized in that the admittances Y1 and Y'1 of the Herter bridge connected to the inverting input of the first operational amplifier have a common value and that the admittances Y2 and Y'2 of the Herter bridge connected to the non-inverting input of the first operational amplifier have a common value whereby the voltage across said third pair of terminals solely depends on the sum of the voltages between the first terminals (v'2-v1) of said first and second pairs of terminals and between the second terminals (v2-v'1) of said first and second pairs of terminals and is directly proportional thereto.
Claim 8
Dependent Claim
81 words
Impedance synthesis multiple loop as claimed in claim 7, characterized in that a source of voltage V1 and admittance G1 biasses the inverting input of the first operational amplifier, that a source of voltage V2 and admittance G2 biasses the non-inverting input of the first operational amplifier and that their values are related to those of the admittances Y1 and Y2 and to those of said first (Y3) and fourth (Y4) admittances by the relations Y1(G2+Y4) = Y2(G1+Y3) G1.Y2.V1 = G2.Y1.V2.
Claim 9
Dependent Claim
25 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that low frequency ringing signals may appear at the output of said other stage.
Claim 10
Dependent Claim
59 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that the outputs of the input (A1) and output (A2) stages are coupled to respective inputs of a double input low pass filter (LP) with an output cut off at a higher frequency that that separating the frequency components at the outputs of the input and output stages.
Claim 11
Dependent Claim
65 words
Impedance synthesis multiple loop as claimed in claim 10, characterized in that the output of the low pass filter is used for telephone dial pulse detection (DI) with the fundamental frequency signal of the dialling pulses appearing at one input of the filter and harmonic frequency signals thereof at the other input while telephone metering pulse bursts frequencies are above the passband of the filter.
Claim 12
Dependent Claim
45 words
Impedance synthesis multiple loop as claimed in claim 10, characterized in that differences in the high and low frequency flat gains of the two stages of the transducer are compensated by different responses for the double input low pass filter in accordance with the input.
Claim 13
Dependent Claim
35 words
Impedance synthesis multiple loop as claimed in claim 12, characterized in that the double input low pass filter is made out of a two-input multiplier/summing circuit feeding a first order switched capacitance low pass filter.
Claim 14
Dependent Claim
66 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that the input terminals of the input stage (A1) are each biassed by a potentiometer (G3, G5 and G4, G6), both potentiometers being branched across a common DC potential source, with the help of controlled gating means (PG5 and PG6) enabling to simultaneously disconnect a pole of the source for each of the two potentiometers.
Claim 15
Dependent Claim
63 words
Impedance synthesis multiple loop as claimed in claims 8 and 14, characterized in that Y1(G4 + Y4) = Y2 (G3 + Y3) G5Y2 = G6Y1 wherein G3 and G4 are those admittances part of the potentiometers which remain connected to one pole of the source and G5 and G6 those admittances which are connected to the other pole through the controlled gating means.
Claim 16
Dependent Claim
75 words
Impedance synthesis multiple loop as claimed in claim 1, characterized in that the output of the output stage (A2) is coupled to a low pass filter (R1, C1) including a capacitance (C1) having at least one of its terminals connected to a pair of controlled gating means, the first (PG1 and PG2) effectively inserting the capacitance into the low pass filter and the second (PG3 and PG4) into a telephone metering pulse shaping circuit (ME).
Claim 17
Dependent Claim
55 words
Impedance synthesis multiple loop as claims in claim 5, characterized in that said second resistive admittance (Ya) may have its value temporarily and substantially reduced (PG7) and that the output of the transducer feeds a telephone line loop closure detector so that the latter can respond more rapidly once a first closure has been detected.