EP0454985A2
Expired / Lapsed
EP
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Scalable compound instruction set machine architecture
Assignee: International Business Machines Corp
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Filing: 1991-03-20
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Granted: —
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Expires: 2011-03-20
Abstract
Abstract Described is a scalable compound instruction set machine and method which provides for processing a set of instructions or program to be executed by a computer to determine statically which instructions may be combined into compound instructions which are executed in parallel by a scalar machine. Such processing looks for classes of instructions that can be executed in parallel without data-dependent or hardware-dependent interlocks. Without regard to their original sequence the individual instructions are combined with one or more other individual instructions to form a compound instruction which eliminates interlocks. Control information is appended to identify information relevant to the execution of the compound instructions. The result is a stream of scalar instructions compounded or grouped together before instruction decode time so that they are already flagged and identified for selective simultaneous parallel execution by execution units. The compounding does not change the object code results and existing programs realize performance improvements while maintaining compatibility with previously implemented systems for which the original set of instructions was provided.
Inventors
- 👤 Bartholomew Blaner
- 👤 Stamatis Vassiliadis
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 20:07
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3818; G06F9/382; G06F9/3017; G06F9/3802; G06F9/3808; G06F9/3836; G06F9/3842; G06F9/3853; G06F9/3885
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
83 words
A method of obtaining parallel execution of existing instructions in a particular configuration of a data processing system, including: allocating certain of the existing instructions into multiple categories; comparing the categories of adjacent existing instructions in an instruction stream to determine whether the adjacent existing instructions are capable of parallel execution in the particular configuration of a data processing system, and identifying with a compounding indicator those adjacent existing instructions which are determined by said comparing step to be capable of parallel execution.
Claim 2
Dependent Claim
24 words
The method of claim 1 wherein said allocating and comparing steps are performed prior to the time the existing instructions are fetched for execution.
Claim 3
Dependent Claim
50 words
The method of claim 1 or 2 wherein said allocating step includes allocating certain instructions into at least one category such that said comparing step causes said identifying step to identify with a compounding indicator at least two adjacent existing instructions from said at least one category for parallel execution.
Claim 4
Independent Claim
55 words
The method of one of claims 1 to 3 wherein said allocating step includes allocating certain instructions into at least two different non-overlapping categories such that said comparing step causes said identifying step to identify with a compounding indicator at least two adjacent existing instructions from said at least two categories, respectively, for parallel execution.
Claim 5
Independent Claim
37 words
The method of one of claims 1 to 4 wherein said identifying step includes leaving the object code of the existing instructions in its original form for execution singly or for execution in parallel with another instruction.
Claim 6
Independent Claim
42 words
The method of one of claims 1 to 5 wherein said allocating step includes taking into account data dependent interlocks between instructions as well as the existence of related interlock collapsing functional units in the particular configuration of the data processing system.
Claim 7
Independent Claim
41 words
The method of one of claims 1 6 wherein said allocating step includes taking into account hardware dependent interlocks between instructions as well as the existence of related interlock collapsing functional units in the particular configuration of the data processing system.
Claim 8
Independent Claim
60 words
The method of one of claims 1 to 7 wherein said comparing step includes comparing a first existing instruction with a second adjacent following instruction for possible compounding with each other, and then comparing the second instruction with a third adjacent following instruction for possible compounding with each other, to identify multiple compound instructions identified by multiple compound indicators, respectively.
Claim 9
Dependent Claim
27 words
The method of claim 8 further including the additional step of determining an optimum sequence of multiple compound instructions for a given portion of an instruction stream.
Claim 10
Independent Claim
35 words
The method of one of claims 1 to 9 wherein said comparing step to determine whether the adjacent existing instructions are capable of parallel execution is based on hardware utilization rather than on opcode description.
Claim 11
Independent Claim
124 words
A system for processing a sequence of instructions taken from an existing set of machine instructions in order to prepare the sequence for parallel execution by a particular computer configuration, including: a set of rules based on the particular computer configuration indicating certain machine instructions which are capable of parallel execution with other machine instructions; and compounding means for pre-processing prior to instruction fetch a binary instruction stream containing a sequence of existing instructions, said compounding means having access to said set of rules for identifying adjacent instructions capable of parallel execution in the particular computer configuration and for producing a compounded sequence of instructions having a control field identifying individual adjacent instructions capable of parallel execution and which together form a compound instruction.
Claim 12
Dependent Claim
23 words
The system of claim 11 wherein said compounding means is a software pre-processing program used as part of a compiler or a post-compiler.
Claim 13
Dependent Claim
28 words
The system of claim 11 or 12 wherein said compounding means is a hardware pre-processing unit which processes instructions prior to their being fetched from a cache buffer.
Claim 14
Independent Claim
35 words
The system of one of claims 11 to 13 wherein said compounding means is capable of producing a compounded sequence of instructions having a control field identifying pairs of adjacent instructions capable of parallel execution.
Claim 15
Dependent Claim
34 words
The system of claim 14 wherein said compounding means is capable of producing a compounded sequence of instructions having a control field identifying groups of three or more adjacent instructions capable of parallel execution.
Claim 16
Independent Claim
24 words
The system of one of claims 11 to 15, wherein said control field comprises at least one identifier bit associated with each compound instruction.
Claim 17
Dependent Claim
25 words
The system of claim 16, wherein said control field includes an identifier bit portion and a control bit portion different from said identifier bit portion.
Claim 18
Independent Claim
28 words
The system of one of claims 11 to 17, wherein said control field comprises at least one identifier bit associated with each individual instruction forming a compound instruction.
Claim 19
Dependent Claim
25 words
The system of claim 18, wherein said control field comprises at least one identifier bit associated with each individual instruction not forming a compound instruction.
Claim 20
Independent Claim
24 words
The system of one of claims 11 to 19 wherein said set of rules is based on hardware utilization rather than on opcode description.
Claim 21
Independent Claim
136 words
A system for generating an instruction stream for parallel execution in a particular computer configuration, comprising: a list of existing scalar instructions grouped into multiple categories based on the capability of the same or different categories of instructions to be executed in parallel in the particular computer configuration; pre-processing means for receiving an input of scalar instructions as part of a binary byte stream, and for determining from said list which adjacent scalar instructions are candidates for parallel execution in the particular computer configuration; and compounding means for creating a tag associated with certain of said scalar instructions in the instruction stream indicating which adjacent scalar instructions are part of a compound instruction capable of parallel execution and which scalar instructions in the instruction stream are not capable of parallel execution in the particular computer configuration.
Claim 22
Dependent Claim
28 words
The system of claim 21 which further includes control means for monitoring the instruction stream and for issuing multiple compound instructions for execution in parallel with each other.
References Cited (Backward Citations)
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