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EP0454984A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

General purpose compounding technique for instruction-level processors

Assignee: International Business Machines Corp
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Filing: 1991-03-20
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Granted: —
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Expires: 2011-03-20
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Abstract

Abstract This is a method of compounding two or more instructions from an instruction stream without knowing the starting point or length of each individual instruction. All instructions include one OP Code at a predetermined field location which identifies the instruction and its length. Those instructions which qualify need to have appropriate tags to indicate they are candidates for compounding. In System 370 where instructions are either 2,4 or 6 bytes in length, the field positions for the OP Code are presumed based on an estimated instruction length code. The value of each tag based on a presumed OP Code is recorded, and the instruction length code in the presumed OP Code is used to locate a complete sequence of possible instructions. Once an actual instruction boundary is found, the corresponding correct tag values are used to identify the commencement of a compound instruction, and other incorrectly generated tags are ignored.

Inventors

  • 👤 Stamatis Vassiliadis
  • 👤 Richard James Eickemeyer

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 10:25
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3802; G06F9/3808; G06F9/30145; G06F9/30149; G06F9/30152; G06F9/3816; G06F9/3836; G06F9/3842; G06F9/3853

Claims Analysis

Total Claims: 27
Claim 1
Independent Claim 90 words
A method of identifying instruction sequences in a byte stream and tagging at least two instructions for parallel execution, including the following steps: starting a first possible instruction sequence by selecting a presumed first instruction; locating a first instruction length for said presumed first instruction in said first possible instruction sequence; using said first instruction length to locate at least a presumed second instruction; and encoding said presumed first and said at least second instructions to indicate whether they are tagged for parallel execution by a particular computer system configuration.
Claim 2
Dependent Claim 67 words
The method of claim 1 further including the steps of locating a second instruction length for said presumed at least second instruction in said first possible instruction sequence; using said second instruction length to locate a presumed at least third instruction; and encoding said presumed second and said at least third instructions to indicate whether they are tagged for parallel execution by a particular computer system configuration.
Claim 3
Dependent Claim 78 words
The method of claim 1 or 2 further including the steps of starting a second possible instruction sequence by selecting a another presumed instruction different from said presumed first instruction; locating another instruction length for said another presumed instruction in said second possible instruction sequence; using said another instruction length to locate a further presumed instruction; and encoding said further and another presumed instructions to indicate whether they are tagged for parallel execution by a particular computer configuration.
Claim 4
Dependent Claim 46 words
The method of claim 3 further including the steps of comparing said presumed first and second instructions in said first possible instruction sequence with said further and another presumed instructions in said second possible instruction sequence to determine whether there is any convergence between instruction boundaries.
Claim 5
Independent Claim 19 words
The method of one of claims 1 to 4 wherein the byte stream includes instructions having a fixed length.
Claim 6
Independent Claim 19 words
The method of one of claims 1 to 5 wherein the byte stream includes instructions having a variable length.
Claim 7
Independent Claim 18 words
The method of one of claims 1 to 6 wherein the byte stream includes non-instructions intermixed with instructions.
Claim 8
Independent Claim 22 words
The method of one of claims 1 to 7 wherein there are not any instruction boundary reference points in the byte stream.
Claim 9
Independent Claim 18 words
The method of one of claims 1 to 8 wherein the byte stream includes non-instructions intermixed with instructions.
Claim 10
Independent Claim 19 words
The method of one of claims 1 to 9 wherein the byte stream includes instructions having a variable length.
Claim 11
Independent Claim 41 words
The method of one of claims 1 to 10 wherein said encoding step includes encoding said presumed first and second and said at least third instructions to indicate whether they are tagged for parallel execution by a particular computer system configuration.
Claim 12
Independent Claim 65 words
The method of one of claims 1 to 11 further including the steps of keeping track of the byte positions associated with said presumed instructions in said first possible instruction sequence; keeping track of the byte positions associated with said presumed instructions in said second possible instruction sequence; and maintaining a separate identifier tag for each of the byte positions associated with said presumed instructions.
Claim 13
Dependent Claim 31 words
The method of claim 12 wherein an instruction is tagged for parallel execution whenever an instruction in either of said first or second possible instruction sequences is encoded for parallel execution.
Claim 14
Independent Claim 36 words
The method of one of claims 1 to 13 wherein an encoding tag identifying the largest number of said as least three presumed instructions capable of parallel execution is maintained for use at instruction execution time.
Claim 15
Independent Claim 87 words
A method of pre-processing certain unfetched instructions in a binary instruction stream to identify instructions capable of parallel execution in a particular computer system configuration, including the steps of: generating a first possible sequence of presumed instructions based on their instruction length; comparing each pair of presumed instructions in said first possible sequence to determine their capability of parallel execution; and encoding a control tag associated with each presumed instruction to identify those pair of presumed instructions tagged for parallel execution in the particular computer system configuration.
Claim 16
Dependent Claim 27 words
The method of claim 15 wherein said comparing step includes comparing a first instruction with its next instruction, and comparing said next instruction with its following instruction.
Claim 17
Dependent Claim 28 words
The method of claim 15 or 16 which further includes generating additional possible sequences of presumed instructions which are different from said first possible sequence of presumed instructions.
Claim 18
Dependent Claim 32 words
The method of claim 17 which further includes using multiple compounding units for encoding a control tag associated with each presumed instruction in said first possible sequence and said additional possible sequences.
Claim 19
Dependent Claim 27 words
The method of claim 17 or 18 wherein said generating addition possible sequences includes starting a new possible sequence at certain fixed intervals in the instruction stream.
Claim 20
Dependent Claim 12 words
The method of claim 19 wherein the fixed intervals are every byte.
Claim 21
Dependent Claim 15 words
The method of claim 19 or 20 wherein the fixed intervals are every other byte.
Claim 22
Independent Claim 22 words
The method of one of claims 15 to 21 wherein said comparing step includes comparing groups of two or more presumed instructions.
Claim 23
Dependent Claim 28 words
The method of claim 22 wherein said comparing step includes comparing groups of two or more adjacent presumed instructions which instructions are in adjacent relationship to each other.
Claim 24
Independent Claim 69 words
A method of processing instructions in an instruction stream having no known instruction boundary reference points, to identify adjacent scalar instructions which are capable of parallel execution in a particular computer configuration, including the steps of: generating different sequences of presumed instructions starting at different possible instruction boundaries; and encoding each presumed instruction with an identifier tag indicating its capability of being executed in parallel with its adjacent instruction.
Claim 25
Dependent Claim 39 words
The method of claim 24 wherein the instructions have a given number of different possible lengths, and wherein said generating step includes generating a different sequence of presumed instructions for each of said given number of different possible lengths.
Claim 26
Dependent Claim 18 words
The method of claim 24 or 25 wherein said given number of possible lengths is two or more.
Claim 27
Dependent Claim 20 words
The method of claim 24 or 25 wherein said given number of possible lengths are aligned on the byte boundaries.

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