EP0451661B1
Expired / Lapsed
EP
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Low power consumption microprocessor
Assignee: Panasonic Holdings Corp
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Filing: 1991-03-30
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Granted: 1995-07-19
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Expires: 2011-03-30
Abstract
No abstract record available.
Inventors
- 👤 Toshimichi Matsuzaki
- 👤 Masashi Deguchi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-25 06:00
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3234; G06F1/324; G06F9/00; G06F9/06; G06F9/22; G06F1/3287; G06F9/30; G06F9/38; G06F9/3867; G06F9/3869; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
128 words
A low power consumption microprocessor comprising: a plurality of operation units (11a, 11b, 11c) for processing operations of different types; a working rate detecting means (14) for detecting the working rate of each of said operation units (11a, 11b, 11c) and for producing working rate data for each unit; a clock generating means (13) for generating a plurality of operation clocks (108) of different frequencies; a plurality of clock selecting means (12a, 12b, 12c), one for each operation unit, and connected between said clock generating means (13) and said operation units (11a, 11b, 11c) for selecting, in response to the receipt of said working rate data, one of said operation clocks (108) with a frequency determined by said working rate data for each operation unit (11a, 11b, 11c).
Claim 2
Dependent Claim
30 words
A low power consumption microprocessor as claimed in Claim 1, wherein each of said operation units (11a, 11b, 11c) produces a busy signal when the operation unit is being operated.
Claim 3
Dependent Claim
89 words
A low power consumption microprocessor as claimed in Claim 2, wherein said working rate detecting means (14) comprises: first counter means (21, 22) provided in association with each unit for counting a clock with a predetermined frequency during the presence of said busy signal, and for producing an overflow signal when a predetermined number of clocks is counted; and second counter means (25) provided in association with said first counter means for counting said overflow signal and for producing said working rate data relatively to the counted overflow signal.
Claim 4
Dependent Claim
56 words
A low power consumption microprocessor as claimed in Claim 3, wherein said working rate detecting means (14) further comprises: minimum detector means (23, 24) for detecting a first counter means with the minimum counted result and for producing a decrement signal to said second counter means, whereby said second counter means decrements said working rate data.
Claim 5
Dependent Claim
24 words
A low power consumption microprocessor as claimed in Claim 1, further comprising instruction decoder means (10) for controlling data exchange between the operation units.
Claim 6
Dependent Claim
32 words
A low power consumption microprocessor as claimed in Claim 1, further comprising wait control means (26) for producing a wait signal when two operation units, operating with different clock frequencies, exchange data.
References Cited (Backward Citations)
No citation records indexed.
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