EP0448494A2
Expired / Lapsed
EP
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Method of controlling access to a bus in a distributed queue dual bus (DQDB) network
Assignee: International Business Machines Corp
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Filing: 1991-01-25
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Granted: —
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Expires: 2011-01-25
Abstract
Abstract A distributed queue dual bus (DQDB) network has two, oppositely-directed, unidirectional busses (46, 48). A node (38) with data to send on one bus, can request access to that bus, by sending a bus request signal to all nodes (36) upstream on the bus (46). The bus request signal is sent to the nodes as part of the traffic flowing on the second bus (48). Each node (38) counts the number of successive bus request signals transported on the second bus (48). In a multiple priority system, multiple counts are maintained, one for each priority level. When a given or local node detects an idle slot on the first node, it may write data into that slot if there are no pending downstream access requests of higher priority and if the local node has allowed enough idle slots to pass since its last write operation to service access requests existing at the time of that operation at the same or higher priority levels.
Inventors
- 👤 Neville Lloyd Golding
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 20:12
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/40; H04L12/40169; H04L12/40176; H04L12/40189; H04L12/2852; H04L12/407; H04L12/417
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
211 words
A method of controlling access to a bus in a network having a plurality of parallel nodes, a first bus connecting said nodes for transmitting bus request signals supplied by said nodes in a first direction and a second bus connecting said nodes for transmitting successive cells of information in a second direction, each of said cells being considered either as busy if it carries data written into the cell by one of the nodes or idle if it carries no such data ; said method being practiced at each of the nodes to access to the second bus and being characterized in that it comprises the steps of : counting the number of bus request signals received at the subject node to determine the number of downstream nodes desiring access to the second bus, increasing the number of bus request signals supplied to the next node only if the subject node desires access to the second bus, monitoring the cells passing the subject node on the second bus and writing data into the first idle cell, and allowing a number of idle cells equal to the number of downstream nodes desiring access to the second bus to pass the subject node before initiating another attempt to access the second bus.
Claim 2
Dependent Claim
258 words
The method according to claim 1 wherein each cell transmitted in said second direction has at least one busy bit and at least one bus request bit, said method comprising the steps of : reading the bus request bit in each cell passing the node on a first bus, counting the number of successive bus request bits having a first value, updating a request value register to equal the count whenever the count becomes greater than the current register value or whenever a bus request bit having a second value is encountered, altering the pattern of bus request bits being transmitted along the first bus only if the node has data to transmit on the second bus, the alteration comprising increasing the number of successive bus request bits having the first value, reading the busy bit in each cell passing the node on the second bus, writing data into the first passing cell on the second bus having a busy bit with a first value, and passing all cells having a busy bit with a second value and a number of cells having a busy bit with the first value where the number equals the count stored in the request value register before making another attempt to access the second bus. means for passing all cells having a busy bit with a second value and a number of cells having a busy bit with the first value where the number equals the count stored in the request value register before making another attempt to access the second bus.
Claim 3
Dependent Claim
215 words
System for controlling access to a bus in a network having a plurality of parallel nodes, a first bus connecting said nodes for transmitting bus request signals supplied by said nodes in a first direction and a second bus connecting said nodes for transmitting successive cells of information in a second direction, each of said cells being considered either as busy if it carries data written into the cell by one of the nodes or idle if it carries no such data ; said system being practiced at each of the nodes to access to said second bus and being characterized in that it comprises : means for counting the number of bus request signals received at the subject node to determine the number of downstream nodes desiring access to the second bus, means for increasing the number of bus request signals supplied to the next node only if the subject node desires access to the second bus, means for monitoring the cells passing the subject node on the second bus and writing data into the first idle cell, and means for allowing a number of idle cells equal to the number of downstream nodes desiring access to the second bus to pass the subject node before initiating another attempt to access the second bus.
Claim 4
Dependent Claim
175 words
The system according to claim 4 wherein each cell transmitted in said second direction has at least one busy bit and at least one bus request bit, said system comprising : means for reading the bus request bit in each cell passing the node on a first bus, means for counting the number of successive bus request bits having a first value, means for updating a request value register to equal the count whenever the count becomes greater than the current register value or whenever a bus request bit having a second value is encountered, means for altering the pattern of bus request bits being transmitted along the first bus only if the node has data to transmit on the second bus, the alteration comprising increasing the number of successive bus request bits having the first value, means for reading the busy bit in each cell passing the node on the second bus, means for writing data into the first passing cell on the second bus having a busy bit with a first value, and
References Cited (Backward Citations)
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