Frame synchronization circuit

Claim 1

A frame synchronization circuit comprising: serial/parallel converting means (10) for converting a serial data signal having blocks each constituted by an M number of bits (M: a natural number) to a parallel data signal of 2M-1 bits on the basis of a reference clock, the format of said serial data signal having a frame synchronization code of a specific pattern constituted by a plurality of continuous blocks concentrated in a frame; and selection means (40) for receiving the parallel data signal of 2M-1 bits and selectively outputting an M-bit data signal corresponding to the bit portion designated by a selection signal; characterized by further comprising: first synchronization detecting means (20) comprising an M number of M-bit pattern detectors (#1 to #M) supplied with M-bit data signals selected from the parallel data signal of 2M-1 bits output from said serial/parallel converting means (10), said M-bit data signals occupying portions of the parallel data signal of 2M-1 bits shifted in sequence by 1 bit starting from a reference bit selected from the least significant bit and the most significant bit, said M-bit pattern detectors being respectively allotted to the bit portions, each of said pattern detectors detecting whether the supplied signal corresponds to the code pattern of the first block of said frame synchronization code; selection signal generating means (30) for holding outputs of said pattern detectors (#1 to #M) of said first synchronization detecting means (20) and outputting them as a selection signal when a switch control signal is of a first level, and maintaining outputs of said pattern detectors (#1 to #M) immediately before the switch control signal is changed to a second level and supplying the maintained data as a selection signal to said selection means (40), so as to cause said selection means (40) to selectively output an M-bit data signal corresponding to the bit portion allocated to a pattern decoder which detects that the supplied signal corresponds to the code pattern of the first block of said frame synchronization code; delay means (70) for delaying an output of said serial/parallel converting means (10) by at least the time required for the operations of said first synchronization detecting means (20) and said selection signal generating means (30) and transmitting it to said selection means (40); second synchronization detection means (80) for detecting at least a main pattern of the frame synchronization code from the output of said selection means (40); timing control means (50) for generating a frame pulse for every frame on the basis of the reference clock, the timing of generation of a frame pulse being controlled on the basis of a phase control signal; and synchronization protecting means (60) including: phase comparing means for comparing the phase of an output of said second synchronization detecting means (80) and that of a frame pulse signal generated by said timing control means (50); discriminating means for discriminating a synchronous state, an asynchronous state, and a hunting state on the basis of the result of comparison in said phase comparing means, said discriminating means discriminating a synchronous state when detecting that these phases coincide consecutively a predetermined number of times on the basis of the result of the comparison, an asynchronous state when detecting that these phases do not coincide consecutively a predetermined number of times on the basis of the result of the comparison, and a hunting state when detecting that these phases do not coincide in the asynchronous state; and control means for transmitting an output of said second synchronization detecting means (80) to said timing control means (50) as a phase control signal for the frame pulse, and also transmitting a switch control signal of a first level to said selection signal generating means (30) when said discriminating means discriminates a hunting state, and a switch control signal of a second level to said selection signal generating means (30) when said discriminating means discriminates another state.