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EP0440445A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

System memory initialization with presence detect encoding

Assignee: HP Inc
•
Filing: 1991-01-30
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Granted: —
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Expires: 2011-01-30
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Abstract

Abstract The microcomputer architecture and method provide for automatic conveyance of system memory configuration information to a memory controller (112) which controls a system memory (110) having numerous allowable memory configurations. The system memory (110) is comprised of conventional SIMMs (1-N) which carry varying DRAM capacities. Each SIMM (1-N) bears a number of unused external pins, which can be used to decipher the DRAM configuration pertaining to that particular SIMM. The SIMMs (1-N) are arranged in pairs and only the unused pins of one SIMM per pair are monitored. During the initialization of the system memory (110), data signals from all of the recognized pins are transmitted to a programmable logic array (PAL) (116), which translates the data signals into a control signal encoding the entire system memory configuration. The control signal is transmitted to the memory controller (112), which recognizes the signals through internal software (227). The internal software (227) performs a two-step analysis to determine the system memory configuration and to insure that the configuration conforms to one of numerous preselected allowable configurations.

Inventors

  • 👤 Irvin R. Jones
  • 👤 Marilyn J. Lang
  • 👤 Wesley H. Stelter

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 11:17
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/06; G06F12/0646; G06F12/0684

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 86 words
A system adapted for use with a microcomputer for automatically conveying system memory configuration information to a memory controller (112) comprising: (1) a system memory having conventional SIMMs (1-N) for carrying DRAMs, said SIMMs (1-N) having unused external pins; (2) said memory controller (112) connected in a controlling relationship to said system memory (110); and (3) a PAL (116) connected to said unused external pins and connected to said memory controller (112) to thereby communicate the entire system memory configuration information to said memory controller (112).
Claim 2
Dependent Claim 13 words
The microcomputer system of claim 1, wherein said SIMMs (1-N) have 72 pins.
Claim 3
Dependent Claim 25 words
The microcomputer system of claim 1, wherein said SIMMs (1-N) comprise first SIMMs having DRAMs with a memory capacity of 256 Kb by 36 bits.
Claim 4
Dependent Claim 25 words
The microcomputer system of claim 1, wherein said SIMMs (1-N) comprise second SIMMs having DRAMs with a memory capacity of 1 MB by 36 bits.
Claim 5
Dependent Claim 19 words
The microcomputer system of claim 1, wherein each of said SIMMs (1-N) have four of said unused external pins.
Claim 6
Dependent Claim 22 words
The microcomputer system of claim 1, wherein said system memory (110) is comprised of any positive integer of SIMMs up to 8.
Claim 7
Dependent Claim 20 words
The microcomputer system of claim 1, wherein said configuration information includes the DRAM memory capacity of the said SIMMs (1-N).
Claim 8
Dependent Claim 21 words
The microcomputer system of claim 1, wherein said configuration information includes the speed of said DRAMs situated on said SIMMs (1-N).
Claim 9
Dependent Claim 19 words
The microcomputer system of claim 1, wherein said system memory (110) can comprise up to 17 different memory capacities.
Claim 10
Independent Claim 135 words
A method for automatically conveying configuration information of a system memory (110) to a memory controller (112) in a microcomputer system, said memory controller (112) in communication via a PAL (116) with said system memory (110), said system memory (110) comprised of SIMMs (1-N) carrying DRAMs, each of said SIMMs bearing unused external pins, the method for automatically conveying system memory configuration information to the memory controller (112) comprising the following steps: (a) reading first signals encoded with memory configuration information relating to each of said SIMMs (1-N) from said unused external pins on each of said SIMMs (1-N) by said PAL (116), (b) translating said first signals into second signals encoded with information pertaining to a system memory configuration, and (c) transmitting said second signals from said PAL (116) to said memory controller (112).

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