EP0438655A2
Expired / Lapsed
EP
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ECL circuit for resistance and temperature bus drop compensation
Assignee: National Semiconductor Corp
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Filing: 1990-11-19
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Granted: —
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Expires: 2010-11-19
Abstract
Abstract A voltage is provided by a master circuit and received by a plurality of slave circuits over a bus. The master circuit includes a V bb reference circuit, a temperature compensation and V cse reference circuit, and a voltage step-up and buffering circuit coupled to the bus. Each of the slave circuits has a pair of transistors coupled to the bus in an emitter-follower configuration to step down the voltage from the master circuit and to provide a voltage reference. The voltage provided to the bus varies as it propagates through the bus. Accordingly, a plurality of unconnected resistors are formed in the portions of the silicon substrate which contain the master and/or slave circuits. When formed in the master circuit, the resistors are located in the V bb reference circuit. When formed in the slave circuit, the resistors are located in close proximity to the output transistors. One or more of the resistors may be selectively coupled to its respective master or slave circuit for compensating for voltage drops along the bus.
Inventors
- 👤 Loren W. Yee
- 👤 Nim Cho Lam
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 20:52
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/086; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
76 words
In a circuit wherein a transistor in an ECL gate array formed in a silicon substrate is coupled to a voltage source through a bus for receiving a voltage therefrom, the voltage emitted by the voltage source varying as it propagates through the bus, an apparatus for compensating for the voltage received by the transistor comprising: an unconnected resistance formed in the substrate in close proximity to the transistor for being selectively coupled to the transistor.
Claim 2
Dependent Claim
17 words
The circuit according to claim 1 further comprising coupling means for coupling the resistance to the transistor.
Claim 3
Dependent Claim
18 words
The circuit according to claim 2 wherein the coupling means comprises a metallization layer disposed over the substrate.
Claim 4
Dependent Claim
80 words
In a circuit wherein a transistor in an ECL gate array formed in a silicon substrate is coupled to a voltage source and to a bus for providing a voltage to the bus, the voltage provided to the bus varying as it propagates through the bus, an apparatus for adjusting the voltage provided to the bus by the transistor comprising: an unconnected resistance formed in the substrate in close proximity to the transistor for being selectively coupled to the transistor.
Claim 5
Dependent Claim
17 words
The circuit according to claim 4 further comprising coupling means for coupling the resistance to the transistor.
Claim 6
Dependent Claim
18 words
The circuit according to claim 5 wherein the coupling means comprises a metalllization layer disposed over the substrate.
Claim 7
Dependent Claim
116 words
A circuit for producing a reference voltage from a supply voltage comprising: a bus; a master circuit formed in a silicon substrate, the master circuit having a first transistor coupled to the supply voltage and to the bus for providing an intermediate voltage to the bus, the intermediate voltage varying as it propagates through the bus; a slave circuit coupled to the master circuit through the bus for receiving the intermediate voltage therefrom, the slave circuit including a second transistor for providing the reference voltage in response to the intermediate voltage; and wherein the master circuit includes compensation means, coupled to the first transistor, for adjusting the value of the intermediate voltage provided to the bus.
Claim 8
Dependent Claim
35 words
The circuit according to claim 7 wherein the compensation means further comprises a plurality of unconnected resistances formed in the substrate in close proximity to the first transistor for being selectively coupled to the transistor.
Claim 9
Dependent Claim
21 words
The circuit according to claim 8 further comprising coupling means for selectively coupling the plurality of resistances to the first transistor.
Claim 10
Dependent Claim
18 words
The circuit according to claim 9 wherein the coupling means comprises a metallization layer disposed over the substrate.
Claim 11
Dependent Claim
24 words
The circuit according to claim 9 wherein the coupling means selectively couples the plurality of resistances between the first transistor and the supply voltage.
Claim 12
Dependent Claim
23 words
The circuit according to claim 11 wherein the coupling means selectively couples the plurality of resistances to a collector of the first transistor.
Claim 13
Dependent Claim
21 words
The circuit according to claim 12 wherein the coupling means selectively couples the plurality of resistances in parallel with each other.
Claim 14
Dependent Claim
18 words
The circuit according to claim 13 wherein the coupling means comprises a metalllization layer disposed over the substrate.
Claim 15
Dependent Claim
117 words
A circuit for producing a reference voltage from a supply voltage comprising: a bus; a master circuit formed in a silicon substrate, the master circuit having a first transistor coupled to the supply voltage and to the bus for providing an intermediate voltage to the bus, the intermediate voltage varying as it propagates through the bus; a slave circuit coupled to the master circuit through the bus for receiving the intermediate voltage therefrom, the slave circuit including a second transistor for providing the reference voltage in response to the intermediate voltage; and wherein the slave circuit includes compensation means, coupled to the second transistor, for compensating for the value of the intermediate voltage received over the bus.
Claim 16
Dependent Claim
35 words
The circuit according to claim 15 wherein the compensation means further comprises a plurality of unconnected resistances formed in the substrate in close proximity to the second transistor for being selectively coupled to the transistor.
Claim 17
Dependent Claim
21 words
The circuit according to claim 16 further comprising coupling means for selectively coupling the plurality of resistances to the second transistor.
Claim 18
Dependent Claim
18 words
The circuit according to claim 17 wherein the coupling means comprises a metalllization layer disposed over the substrate.
Claim 19
Dependent Claim
35 words
The circuit according to claim 17 wherein the second transistor is coupled to the supply voltage, and wherein the coupling means selectively couples the plurality of resistances between the second transistor and the supply voltage.
Claim 20
Dependent Claim
23 words
The circuit according to claim 19 wherein the coupling means selectively couples the plurality of resistances to a collector of the second transistor.
Claim 21
Dependent Claim
21 words
The circuit according to claim 20 wherein the coupling means selectively couples the plurality of resistances in parallel with each other.
Claim 22
Dependent Claim
18 words
The circuit according to claim 21 wherein the coupling means comprises a metalllization layer disposed over the substrate.
Claim 23
Dependent Claim
191 words
A circuit for producing a reference voltage level from a supply voltage comprising: a bus; a master circuit formed in a silicon substrate including: a Vcs circuit for producing a Vcs reference voltage, the Vcs circuit including a first resistance and a diode coupled to the supply voltage; first voltage producing means, coupled to the Vcs reference circuit, for producing a first voltage larger than the reference voltage by the base-emitter voltage drop of a transistor in the Vcs reference circuit; step-up means, coupled to the voltage producing means and to the bus, for producing a second voltage to the bus larger than the first voltage by the base-emitter voltage drop of a transistor in the step-up means; compensation means, coupled to the first resistor, for adjusting the value of the second voltage provided to the bus; and a slave circuit coupled to the bus for receiving the second voltage therefrom and for producing the reference voltage level in response thereto, the slave circuit including first and second cascaded transistors coupled in an emitter-follower configuration wherein the emitter of the first transistor is coupled to the base of the second transistor.
Claim 24
Dependent Claim
37 words
The circuit according to claim 23 wherein the compensation means further comprises a plurality of unconnected second resistances formed in the substrate in close proximity to the first resistance for being selectively coupled to the first resistance.
Claim 25
Dependent Claim
22 words
The circuit according to claim 24 further comprising coupling means for selectively coupling the plurality of second resistances to the first resistance.
Claim 26
Dependent Claim
18 words
The circuit according to claim 25 wherein the coupling means comprises a metallization layer disposed over the substrate.
Claim 27
Dependent Claim
23 words
The circuit according to claim 26 wherein the coupling means selectively couples the plurality of second resistances in parallel with the first resistance.
Claim 28
Dependent Claim
211 words
A circuit for producing a reference voltage level from a supply voltage comprising: a bus; a master circuit formed in a silicon substrate including: a Vcs circuit for producing a Vcs reference voltage, the Vcs circuit including a first resistance and a diode coupled to the supply voltage; first voltage producing means, coupled to said Vcs reference circuit, for producing a first voltage larger than the reference voltage by the base-emitter voltage drop of a transistor in the Vcs reference circuit; step-up means, coupled to the voltage producing means and to the bus, for producing a second voltage to the bus larger than the first voltage by the base-emitter voltage drop of a transistor in the step-up means, wherein the second voltage varies as it propagates through the bus; and a slave circuit formed in a silicon substrate and coupled to the bus for receiving the second voltage therefrom and for producing the reference voltage level in response thereto, the slave circuit including: first and second cascaded transistors coupled in an emitter-follower configuration wherein the emitter of the first transistor is coupled to the base of the second transistor; and first compensation means, coupled to the second transistor, for compensating for the value of the second voltage received over the bus.
Claim 29
Dependent Claim
38 words
The circuit according to claim 28 wherein the first compensation means further comprises a plurality of unconnected second resistances formed in the substrate in close proximity to the second transistor for being selectively coupled to the second transistor.
Claim 30
Dependent Claim
22 words
The circuit according to claim 29 further comprising coupling means for selectively coupling the plurality of second resistances to the second transistor.
Claim 31
Dependent Claim
18 words
The circuit according to claim 30 wherein the coupling means comprises a metallization layer disposed over the substrate.
Claim 32
Dependent Claim
36 words
The circuit according to claim 30 wherein the second transistor is coupled to the supply voltage, and wherein the coupling means selectively couples the plurality of second resistances between the second transistor and the supply voltage.
Claim 33
Dependent Claim
24 words
The circuit according to claim 32 wherein the coupling means selectively couples the plurality of second resistances to a collector of the second transistor.
Claim 34
Dependent Claim
22 words
The circuit according to claim 33 wherein the coupling means selectively couples the plurality of second resistances in parallel with each other.
Claim 35
Dependent Claim
18 words
The circuit according to claim 34 wherein the coupling means comprises a metallization layer disposed over the substrate.
Claim 36
Dependent Claim
32 words
The circuit according to claim 29 wherein the master circuit further comprises second compensation means, coupled to the first resistor, for adjusting the value of the second voltage provided to the bus.
Claim 37
Dependent Claim
38 words
The circuit according to claim 36 wherein the second compensation means further comprises a plurality of unconnected third resistances formed in the substrate in close proximity to the first resistor for being selectively coupled to the first resistance.
Claim 38
Dependent Claim
22 words
The circuit according to claim 37 further comprising coupling means for selectively coupling the plurality of third resistance to the first resistance.
Claim 39
Dependent Claim
18 words
The circuit according to claim 38 wherein the coupling means comprises a metallization layer disposed over the substrate.
Claim 40
Dependent Claim
21 words
The circuit according to claim 39 wherein the metallization layer selectively couples the plurality of third resistances to the first resistance.
Claim 41
Dependent Claim
21 words
The circuit according to claim 41 wherein the metallization layer selectively couples the plurality of second resistances to the second transistor.
Claim 42
Dependent Claim
45 words
The circuit according to claim 41 wherein the metallization layer selectively couples the plurality of third resistances in parallel with the first resistance, and wherein the metallization layer selectively couples the plurality of second resistances in parallel between the second transistor and the supply voltage.
References Cited (Backward Citations)
No citation records indexed.
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