EP0434355A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Differential phase demodulator for PSK-modulated signals

Assignee: NEC Corp

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Filing: 1990-12-18

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Granted: —

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Expires: 2010-12-18

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Abstract

Abstract A demodulator for demodulating an intermediate frequency (IF) signal of a PSK-modulated signal and for producing decoded data includes a zero-cross detector for detecting the zero-cross points of the IF signal and for generating a zero-cross detection signal, synchronizing means responsive to a baud-timing signal derived from the IF signals and the zero-cross detection signal for synchronizing the baud-timing signal with the zero-cross signal and for producing a synchronized baud-timing signal, an oscillator for generating a clock signal having a predetermined frequency, a counter responsive to the clock signal for counting the clock signal and for producing a counter output, a phase difference detector responsive to the counter ouput and the synchronized baud-timing signal for calculating a change in the counter output per period of the synchronized baud-timing signal and for producing the result as phase difference data, and decision means responsive to the phase difference data for deciding received data based on the phase difference data and for producing the result of the decision as the decoded data.

Inventors

👤 Hideho C/O Nec Corporation Tomita

Bibliographic Details

Application Number —

Jurisdiction EP

Data Source google_patents

Last Synchronized 2026-11-08 08:03

CPC Classifications

H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/233; H04L27/2335; H04L27/2337

Claims Analysis

Total Claims: 6

Claim 1

Independent Claim 172 words

A demodulator for demodulating an intermediate frequency (IF) signal of a PSK-modulated signal and producing decoded data comprising: zero-cross detecting means for detecting the zero-corss points of said IF signal and generating a zero-cross detection signal; synchronizing means responsive to a baud timing signal derived from said IF signals and said zero-cross detection signal for synchronizing said baud timing signal with said zero-cross signal and for producing a synchronized baud timing signal; oscillator means for generating a clock signal having a predetermined frequency; counter means responsive to said clock signal for counting said clock signal and for producing a counter output; phase difference detecting means responsive to said counter output and said synchronized baud timing signal for calculating a change of said counter output per period of said synchronized baud timing signal and for producing the result as the phase difference data; and decision means responsive to said phase difference data for deciding received data based on said phase difference data and for producing the result of decision as said decoded data.

Claim 2

Dependent Claim 36 words

A demodulator, as claimed in Claim 1, wherein said zero-cross detecting means comprises limiter means responsive to said IF signal for, keeping its amplitude constant, and supplying the constant-amplitude IF signal as said zero-cross detection signal.

Claim 3

Dependent Claim 44 words

A demodulator, as claimed in Claim 1, wherein said synchronizing means comprises filp-flop means responsive to said zero-cross detection signal as a clock signal and said baud timing signal as data input for producing and the data output as said synchronized baud timing signal.

Claim 4

Dependent Claim 87 words

A demodulator, as claimed in Claim 1, wherein said phase difference detecting means comprises first latching means for latching said counter output by said synchronized baud timing signal and producing the latched counter output as first counter output; delaying means for delaying said first counter output by one period of said synchronized baud timing signal and producing the delayed counter output as second counter output; and arithmetic means for determining the difference between said first and second counter outputs and producing it as said phase difference data.

Claim 5

Dependent Claim 33 words

A demodulator, as claimed in Claim 1, further comprising: baud timing signal generating means responsive to said IF signal for generating said baud timing signal representing a baud timing of said IF signal.

Claim 6

Dependent Claim 53 words

A demodulator, as claimed in Claim 5, wherein said baud timing signal generating means comprises: received signal strength indicate (RSSI) signal generating means for generating from said IF signal an RSSI signal indicating the received field strength; and a narrow-band pass filter for receiving said RSSI signal and generating said baud timing signal.

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