Interframe adaptive vector quantization encoding apparatus and video encoding transmission apparatus

Claim 2

An interframe adaptive vector quantization apparatus comprising a cos conversion normalization member for performing cos conversion of the input vector and separating the d.c. component and normalizing the amplitude of the a.c. component so as to obtain the cos conversion normalization input vector, and the vector quantization eoncoding member comprises a vector quantization member including a first code table memory to enable rewriting of content of the cos conversion normalization input vector dynamically for selecting the cos conversion normalization output vector to provide the minimum distortion to the cos conversion normalization input vector among set of the cos conversion output vectors stored in the first code table memory and outputting the vector quantization index of the cos conversion normalization output vector, a code table updating member for performing vector adding averaging of the cos conversion normalization input vector group quantized to the same index in the vector quantization member and writing it as set of the updated cos conversion normalization output vectors in the first code table memory, and an encoder for encoding the updated cos conversion normalization output vectors, the vector quantization index obtained in the vector quantization member using the set, the d.c. component and the amplitude and transmitting them, and the vector quantization decoding member comprises a decoder for decoding the encoding member output signals transmitted from the encoder, a second code table memory which can write the set of the updated cos conversion normalization output vectors, and a normalization restoration inverse cos conversion circuit for multiplying the amplitude component decoded by the decoder to the cos conversion normalization output vectors read from the second code table memory according to the vector quantization index decoded by the decoder and adding the d.c. component decoded and performing the inverse cos conversion so as to reproduce the output vectors.

Claim 3

An interframe adaptive vector quantization apparatus as set forth in claim 1, the vector quantization encoding member comprises an amplitude correction circuit for correcting the normalization constant calculated in the normalization circuit.

Claim 4

An interframe adaptive vector quantization apparatus, wherein the subtractor performs subtraction of color video correlation prediction signal formed from the color video input signal series composed of three components utilizing the color video reproduction signal series already encoded per each channel and outputs each color video difference signal, the vector quantization encoding member is provided with a vector quantizer which brings together the color video difference signals of K in number (K: integer being not less than 3) and performs the vector quantization of the vectors at K-dimensional signal space and outputs the output vector to provide the minimum distortion to the input vector and the index thereof, the adder addes the output vector to provide the minimum distortion as the color video vector quantization signal to the color video correlation prediction signal per each channel so as to obtain each color video reproduction signal, and the color video correlation prediction signal is obtained from the color video signal prediction device which performs multiplication of each color video signal prediction coefficient and each prediction coefficient between color video signals to the encoded signal series of each color video reproduction signal based on correlation not only between adjacent picture elements but also between various color channel picture elements.

Claim 5

An interframe adaptive vector quantization apparatus, wherein the subtractor performs subtraction of color video correlation prediction signal formed from the color video input signal series composed of three components utilizing the color video reproduction signal series already encoded per each channel and outputs each color video difference signal, the vector quantization encoding member is provided with a vector quantizer which brings together the color video difference signals of K in number (K: integer being not less than 3) and performs the vector quantization of the vectors at K-dimensional signal space and outputs the output vector to provide the minimum distortion to the input vector and the index thereof, the adder addes the output vector to provide the minimum distortion as the color video vector quantization signal to the color video correlation prediction signal per each channel so as to obtain each color video reproduction signal, and the color video correlation prediction signal is obtained from the color video signal prediction device which performs multiplication of each color video signal prediction coefficient and each prediction coefficient between color video signals to the encoded signal series of each color video reproduction signal based on correlation not only between adjacent picture elements but also between various color channel picture elements.

Claim 6

An interframe adaptive vector quantization apparatus, wherein a matrix conversion circuit converts the color video input signal composed of three elements into luminance component and color difference component, a mean value separation circuit separates one or plural mean values among input vectors obtained by block formation of the luminous component and the color difference component throughout plural picture elements and normalizes amplitude of the output signals so as to obtain the mean value separation normalization vector, the vector quantization encoding member comprises an input vector register for storing each signal component after the vector normalization, a distortion calculation circuit for taking output signal of the output vector control table which previously stores mean value separation normalization output vector group specified to provide the minimum distortion to the output of the input vector register so as to output the mean value separation normalization output vector group, and thereby the distortion calculation circuit calculating the distortion, a minimum distortion detection circuit for detecting the minimum distortion among the distortions, and an index latch using the mean value outputted from the mean value separation circuit, the amplitude value outputted from the normalization circuit and the index strobe signal from the minimum distortion detection circuit as input and providing index of the minimum distortion vector outputted through the index register, and the vector quantization decoding member comprises an output vector address counter for supplying address signal to the output vector code table and index signal to the register, an amplitude reproduction circuit for decoding the encoding signal of the encoding circuit and obtaining the index of the mean value separation normalization output vector to provide the minimum distortion and the mean value and the amplitude value and performing the amplitude reproduction to the mean value separation normalization output vector decoded by the output vector code table using the decoded amplitude value, a mean value adding circuit for performing the mean value adding to the output of the amplitude reproduction circuit using the decoded mean value, and a matrix reverse conversion circuit for performing the matrix reverse conversion of the output of the mean value adding circuit composed of the luminance component and the color difference component into components of red, green and blue.

Claim 7

An interframe adaptive vector quantization apparatus, wherein a matrix conversion circuit converts the color video input signal composed of three elements into luminance component and color difference component, a mean value separation circuit separates one or plural mean values among input vectors obtained by block formation of the luminous component and the color difference component throughout plural picture elements and normalizes amplitude of the output signals so as to obtain the mean value separation normalization vector, the vector quantization encoding member comprises an input vector register for storing each signal component after the vector normalization, a distortion calculation circuit for taking output signal of the output vector control table which previously stores mean value separation normalization output vector group specified to provide the minimum distortion to the output of the input vector register so as to output the mean value separation normalization output vector group, and thereby the distortion calculation circuit calculating the distortion, a minimum distortion detection circuit for detecting the minimum distortion among the distortions, and an index latch using the mean value outputted from the mean value separation circuit, the amplitude value outputted from the normalization circuit and the index strobe signal from the minimum distortion detection circuit as input and providing index of the minimum distortion vector outputted through the index register, and the vector quantization decoding member comprises an output vector address counter for supplying address signal to the output vector code table and index signal to the register, an amplitude reproduction circuit for decoding the encoding signal of the encoding circuit and obtaining the index of the mean value separation normalization output vector to provide the minimum distortion and the mean value and the amplitude value and performing the amplitude reproduction to the mean value separation normalization output vector decoded by the output vector code table using the decoded amplitude value, a mean value adding circuit for performing the mean value adding to the output of the amplitude reproduction circuit using the decoded mean value, and a matrix reverse conversion circuit for performing the matrix reverse conversion of the output of the mean value adding circuit composed of the luminance component and the color difference component into components of red, green and blue.

Claim 8

An interframe adaptive vector quantization encoding apparatus as set forth in claim 7, wherein the mean value separation of only the luminance component is performed in the mean value separation circuit.

Claim 9

A video encoding transmission apparatus comprising: a video encoding circuit for inputting video signal and performing A/D conversion of the signal and then applying efficient video encoding processing per frame to digital video data taken per 3 very other video frame; a transmission buffer constituted by a double buffer to enable simultaneous write/read, for storing one video frame of variable length encoding data with the information generating amount as the video encoding circuit output being not constant and outputting the encoding data at constant speed by the speed smoothing; a transmission control member at transmission side for performing the transmission framing to enable discrimination per one frame unit to the encoding data transmitted from the transmission buffer and transmitting the encoding data from the transmission buffer to the digital transmission path at constant speed; a transmission control member at receiving side for receiving the encoding data transmitted from the digital transmission path; a receiving buffer constituted by a double buffer to enable simultaneous write/read, for storing one frame of encoding data among the receiving data supplied from the transmission control member at receiving side and outputting one video frame of the encoding data at speed being different from the inputting state using synchronous signal supplied from a synchronous signal generating circuit at detecting side as hereinafter described; a synchronous signal generating circuit at decoding side for generating various clocks required for the decoding action at asynchronous state to the transmission side; a video decoding circuit for performing decoding of one video frame of the encoding data using the decoding clock supplied from the synchronous signal generating circuit at decoding side; and a controller for controlling the input/output operation of the transmission buffer and the receiving buffer.

Claim 10

A video encoding transmission apparatus comprising: a video encoding circuit for inputting video signal and performing A/D conversion of the signal and then applying efficient video encoding processing per frame to digital video data taken per 3 very other video frame; a transmission buffer constituted by a double buffer to enable simultaneous write/read, for storing one video frame of variable length encoding data with the information generating amount as the video encoding circuit output being not constant and outputting the encoding data at constant speed by the speed smoothing; a transmission control member at transmission side for performing the transmission framing to enable discrimination per one frame unit to the encoding data transmitted from the transmission buffer and transmitting the encoding data from the transmission buffer to the digital transmission path at constant speed; a transmission control member at receiving side for receiving the encoding data transmitted from the digital transmission path; a receiving buffer constituted by a double buffer to enable simultaneous write/read, for storing one frame of encoding data among the receiving data supplied from the transmission control member at receiving side and outputting one video frame of the encoding data at speed being different from the inputting state using synchronous signal supplied from a synchronous signal generating circuit at detecting side as hereinafter described; a synchronous signal generating circuit at decoding side for generating various clocks required for the decoding action at asynchronous state to the transmission side; a video decoding circuit for performing decoding of one video frame of the encoding data using the decoding clock supplied from the synchronous signal generating circuit at decoding side; and a controller for controlling the input/output operation of the transmission buffer and the receiving buffer.

Claim 11

A video encoding transmission apparatus wherein a transmission buffer is composed of first and second buffer memories to store two frames of variable length encoding data which is subjected to efficient video encoding per one video frame in the video encoding circuit at transmission side, and transmission time of one frame of variable length encoding data becomes longer than two times of the video frame time at transmission side, said apparatus comprising: a controller at transmission side for performing read/write changing control of the first and second buffer memories with respect to the transmission time of one video frame of variable length encoding data and performing efficient video encoding of one frame so that encoding of the video frame is finished in the transmission time and the apparatus is at standby state; a controller at receiving side composed of third and fourth buffer memories, for performing changing control of the third and fourth buffer memories also in synchronization with the transmission time of one video frame of variable length encoding data and performing control to read the variable length encoding data during one frame period in video frame at receiving side independent of the transmission side from the previous receiving at one of the third or fourth buffer memory until finishing of receiving of next variable length data; and a video decoding circuit for outputting the reproduction video signal subjected to efficient video decoding repeatedly until next one frame of the variable length encoding data is received.

Claim 12

A video encoding transmission apparatus wherein a transmission buffer is composed of first and second buffer memories to store two frames of variable length encoding data which is subjected to efficient video encoding per one video frame in the video encoding circuit at transmission side, and transmission time of one frame of variable length encoding data becomes longer than two times of the video frame time at transmission side, said apparatus comprising: a controller at transmission side for performing read/write changing control of the first and second buffer memories with respect to the transmission time of one video frame of variable length encoding data and performing efficient video encoding of one frame so that encoding of the video frame is finished in the transmission time and the apparatus is at standby state; a controller at receiving side composed of third and fourth buffer memories, for performing changing control of the third and fourth buffer memories also in synchronization with the transmission time of one video frame of variable length encoding data and performing control to read the variable length encoding data during one frame period in video frame at receiving side independent of the transmission side from the previous receiving at one of the third or fourth buffer memory until finishing of receiving of next variable length data; and a video decoding circuit for outputting the reproduction video signal subjected to efficient video decoding repeatedly until next one frame of the variable length encoding data is received.

Claim 13

A video encoding transmission apparatus wherein transmission time of one frame of variable length encoding data becomes less than two times of the video frame time at transmission side, said apparatus comprising: a controller at transmission side for performing changing control of write of the transmission buffer with respect to encoding time of the video encoding circuit, i.e., time of two video frames; a transmission control member at transmission side for transmitting a transmission frame with header indicating idle state so as to inform the standby state of variable length encoding data in the transmission buffer to the receiving side; a transmission control member at receiving side for discriminating the idle frame from the transmission frame of variable length encoding data and outputting the variable length encoding data per one frame to the third and fourth buffer memories at receiving side; a controller at receiving side for controlling the third and fourth receiving buffer memories so that the video decoding circuit is transmitted in synchronization with starting of the receiving video frame after finishing of one frame of variable length data transmitted in the time of two frames of the transmission video frame; and a video decoding circuit for performing efficient video decoding of one frame of the variable length encoding data outputted from the third and fourth buffer memories in synchronization with the receiving video frame time and repeatedly outputting the reproduction video signal decoded in the preceeding video frame regarding the video frame without the receiving variable length encoding data so as to absorb phase jitter of the video frame period independent at transmission and receiving sides.

Claim 14

A video encoding transmission apparatus wherein transmission time of one frame of variable length encoding data becomes less than two times of the video frame time at transmission side, said apparatus comprising: a controller at transmission side for performing changing control of write of the transmission buffer with respect to encoding time of the video encoding circuit, i.e., time of two video frames; a transmission control member at transmission side for transmitting a transmission frame with header indicating idle state so as to inform the standby state of variable length encoding data in the transmission buffer to the receiving side; a transmission control member at receiving side for discriminating the idle frame from the transmission frame of variable length encoding data and outputting the variable length encoding data per one frame to the third and fourth buffer memories at receiving side; a controller at receiving side for controlling the third and fourth receiving buffer memories so that the video decoding circuit is transmitted in synchronization with starting of the receiving video frame after finishing of one frame of variable length data transmitted in the time of two frames of the transmission video frame; and a video decoding circuit for performing efficient video decoding of one frame of the variable length encoding data outputted from the third and fourth buffer memories in synchronization with the receiving video frame time and repeatedly outputting the reproduction video signal decoded in the preceeding video frame regarding the video frame without the receiving variable length encoding data so as to absorb phase jitter of the video frame period independent at transmission and receiving sides.

Claim 15

A video encoding transmission apparatus as set forth in claim 11, wherein a video encoding circuit is provided so that, if the transmission time of one frame of variable length encoding data is quite long in comparison to the transmission video frame time, the efficient video encoding per one video frame at transmission side is controlled at time lapse in the period of two frames.