Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
162 words
A method for real-time power conservation for a portable computer bearing at least one central processing unit (CPU) and controlled by an operating system, comprising the steps of: (a) accepting control from said operating system; (b) determining whether said at least one CPU is available to be slept; (c) determining a current clock rate for each of said at least one CPU; (d) saving a value equal to said determined current clock rate; (e) indicating to a hardware selector to sleep said at least one CPU; (f) determining whether an interrupt has occurred; (g) if an interrupt has not occurred, repeating step (f) wherein said CPU remains asleep until an interrupt has occurred; (h) if an interrupt has occurred, indicating to said hardware selector to awaken said at least one CPU; (i) retrieving said saved value equal to said determined current clock rate; (j) setting said current clock rate equal to said retrieved value; and (k) returning control to said operating system.
Claim 2
Independent Claim
162 words
A method for real-time power conservation for a portable computer bearing at least one central processing unit (CPU) and controlled by an operating system, comprising the steps of: (a) accepting control from said operating system; (b) determining whether said at least one CPU is available to be slept; (c) determining a current clock rate for each of said at least one CPU; (d) saving a value equal to said determined current clock rate; (e) indicating to a hardware selector to sleep said at least one CPU; (f) determining whether an interrupt has occurred; (g) if an interrupt has not occurred, repeating step (f) wherein said CPU remains asleep until an interrupt has occurred; (h) if an interrupt has occurred, indicating to said hardware selector to awaken said at least one CPU; (i) retrieving said saved value equal to said determined current clock rate; (j) setting said current clock rate equal to said retrieved value; and (k) returning control to said operating system.
Claim 3
Dependent Claim
81 words
The method for real-time power conservation of claim 1, wherein said step (e) of indicating to a hardware selector to sleep said at least one CPU, further comprises the steps of: (l) pulsing said hardware selector with a sleep CPU command via a communication line to said hardware selector; (m) selecting of a sleep clock by said hardware selector based on said sleep CPU command; and (n) passing pulses from said sleep clock to said CPU to thereby sleep said CPU.
Claim 4
Independent Claim
85 words
The method for real-time power conservation of claims 1 or 2, wherein said step (h) of indicating to said hardware selector to awaken said at least one CPU, further comprises the steps of: (o) pulsing said hardware selector with a wake CPU command via a communication line to said hardware selector; (p) selecting of a high speed clock by said hardware selector based on said wake CPU command; and (q) passing pulses from said high speed clock to said CPU to thereby wake said CPU.
Claim 5
Independent Claim
76 words
The method for real-time power conservation of claims 1, 2 or 3, wherein said step (b) of determining whether said at least one CPU is available to be slept, further comprises the steps of: (r) checking to see if said CPU is already asleep; (s) if not, determining whether there are interrupts available to wake said CPU before said CPU is slept; and (t) returning control to said operating system if there are not interrupts available.
Claim 6
Independent Claim
141 words
The method for real-time power conservation of claims 1, 2, 3 or 4, wherein said step (b) of determining whether said at least one CPU is available to be slept, further comprises the steps of: (r) checking to see if said CPU has received a request; (s) if said CPU has received a request, determining whether said request is a critical input/output; (t) returning control to said operating system if said request is a critical input/output; (u) if said request was not a critical input/output, determining whether there are any interrupts available to wake said CPU before said CPU is slept; (v) returning control to said operating system if there are no interrupts available; (w) determining whether said request is from a slow input/output; and (x) returning control to said operating system if said request is not from a slow input/output.
Claim 7
Dependent Claim
55 words
The method for real-time power conservation of claim 1, wherein said step (e) of indicating to a hardware selector to sleep said at least one CPU, further comprising the steps of: (l) determining whether there has been an increase in CPU activity; and (m) adjusting CPU rest interval according to said determination of step (l).
Claim 8
Dependent Claim
20 words
The method for real-time power conservation of claim 1, wherein said interrupt can be any periodic activity within the system.
Claim 9
Independent Claim
137 words
An apparatus for power conservation in a computer bearing a central processing unit (CPU), comprising: a CPU activity detector; a CPU clock; a first oscillator for providing high speed pulses; a second oscillator for providing low speed pulses; a hardware selector for choosing between said first oscillator and said second oscillator, wherein said hardware selector is adapted to receive said high speed pulses from said first oscillator if it is chosen or said low speed pulses from said second oscillator if it is chosen, wherein said hardware selector is further adapted to forward appropriate pulses from said chosen oscillator to said CPU clock; a CPU sleep manager adapted to receive detected CPU activity from said CPU activity detector, further adapted to generate a pulse to said hardware selector thereby designating which oscillator said hardware selector should choose.
Claim 10
Independent Claim
137 words
An apparatus for power conservation in a computer bearing a central processing unit (CPU), comprising: a CPU activity detector; a CPU clock; a first oscillator for providing high speed pulses; a second oscillator for providing low speed pulses; a hardware selector for choosing between said first oscillator and said second oscillator, wherein said hardware selector is adapted to receive said high speed pulses from said first oscillator if it is chosen or said low speed pulses from said second oscillator if it is chosen, wherein said hardware selector is further adapted to forward appropriate pulses from said chosen oscillator to said CPU clock; a CPU sleep manager adapted to receive detected CPU activity from said CPU activity detector, further adapted to generate a pulse to said hardware selector thereby designating which oscillator said hardware selector should choose.
Claim 11
Dependent Claim
22 words
The apparatus for power conservation of claim 8, wherein said CPU activity detector and said CPU sleep manager reside within said CPU.
Claim 12
Dependent Claim
23 words
The apparatus for power conservation of claim 8, wherein said CPU activity detector and said CPU sleep manager reside external to said CPU.
Claim 13
Dependent Claim
27 words
The apparatus for power conservation of claim 8, wherein said CPU activity detector resides within said CPU while said CPU sleep manager resides external to said CPU.
Claim 14
Dependent Claim
27 words
The apparatus for power conservation of claim 8, wherein said CPU activity detector resides external to said CPU while said CPU sleep manager resides within said CPU.
Claim 15
Dependent Claim
70 words
The apparatus for power conservation of claim 8, wherein said CPU activity detector further comprises: a detector for detecting a rate of critical input/output interrupts received by said CPU; a comparator for determining whether said detected rate has increased; an indicator for indicating a current CPU activity level based on the results from said comparator; and a designator for communicating said current CPU activity level to said CPU sleep manager.
Claim 16
Dependent Claim
137 words
The apparatus for power conservation of claim 8, wherein said CPU sleep manager further comprises: a receiver for receiving a current detected CPU activity level from said CPU activity detector; an adjustor which operates in response to said received current detected CPU activity level, for lengthening a CPU rest period when said current detected CPU activity level has decreased or for shortening said CPU rest period when said current detected CPU activity level has increased; a clock rate keeper for determining a current clock rate for said CPU, for saving a value equal to said current clock rate while said CPU sleeps, as well as for retrieving said saved value when said CPU is to wake; and a pulse generator for generating a pulse for designating to said hardware selector which oscillator said hardware selector should choose.