Instructing method and execution system

Claim 2

An instructing method for specifying an instruction which is to be executed in an information processing apparatus, characterized in that said instructing method comprises the steps of: forming each of instruction words from at least an instruction code (OPa, OPb, OPC) and an operand specifying part (Ra1-Rac, Rb1-Rb3, Rc1-Rc3), for specifying a single instruction; forming each of long instruction words having a fixed length from a type code (Type) and one or plurality of said instruction words, said type code specifying a structure of the one or plurality of said instruction words included in the long instruction word; and specifying one or plurality of instructions by a said long instruction word.

Claim 3

The instructing method as claimed in claim 1, characterized in that said instruction words include a first instruction word having a first format (A), a second instruction word having a second format (B) and a third instruction word having a third format (C, D), said first instruction word instructing an operation between contents of first and second registers and a storage of an operation result in a third register, said second instruction word instructing an operation between the content of the first register and an immediate data and a storage of an operation result in the third register, said third instruction word instructing a storage of an immediate data into the third register.

Claim 4

The instructing method as claimed in claim 2, characterized in that said long instruction words include a first long instruction word having a first word format (FIG.2A), a second long instruction word having a second word format (FIG.2B), a third long instruction word having a third word format (FIG.2C) and a fourth long instruction word having a fourth word format (FIG.2D), said first long instruction word being made up of said type code and three said first instruction words, said second long instruction word being made up of said type code, a said first instruction word and a said second instruction word, said third long instruction word being made up of said type code, a said first instruction word and a said third instruction word, said fourth long instruction word being made up of said type code and a said third instructions word.

Claim 5

The instructing method as claimed in claim 3, characterized in that said type code is made up of four bits, said first instruction word is made up of twenty bits, said second instruction word is made up of forty bits, said third instruction word is made up of forty or sixty bits, and the fixed length of said long instruction words is sixty-four bits.

Claim 6

An execution system for executing instructions in an information processing apparatus, characterized in that there are provided: input means (22) for inputting a long instruction word which has a fixed length, said long instruction word being made up of a type code (Type) and one or a plurality of instruction words, each of said instruction words including at least an instruction code (OPa, OPb, OPC) and an operand specifying part (Ra1-Ra3, Rb1-Rb3, Rc1-Rc3) for specifying a single instruction, said type code specifying a structure of the one or plurality of said instruction words included in the long instruction word; judging means (23) coupled to said input means for judging from the type code a combination and a number of the instruction words included in the long instruction word and for outputting a judgement result; a plurality of operation means (56, 60, 63) coupled to said judging means for independently carrying out operations specified by the instruction words included in the long instruction word; and assigning means (23, 54, 58) coupled to said judging means for assigning an operation specified by each instruction word included in the long instruction word to one of said operation means depending on the judgement result output from said judging means.

Claim 7

An execution system for executing instructions in an information processing apparatus, characterized in that there are provided: input means (22) for inputting a long instruction word which has a fixed length, said long instruction word being made up of a type code (Type) and one or a plurality of instruction words, each of said instruction words including at least an instruction code (OPa, OPb, OPC) and an operand specifying part (Ra1-Ra3, Rb1-Rb3, Rc1-Rc3) for specifying a single instruction, said type code specifying a structure of the one or plurality of said instruction words included in the long instruction word; judging means (23) coupled to said input means for judging from the type code a combination and a number of the instruction words included in the long instruction word and for outputting a judgement result; a plurality of operation means (56, 60, 63) coupled to said judging means for independently carrying out operations specified by the instruction words included in the long instruction word; and assigning means (23, 54, 58) coupled to said judging means for assigning an operation specified by each instruction word included in the long instruction word to one of said operation means depending on the judgement result output from said judging means.

Claim 8

The execution system as claimed in claim 5, characterized in that said operation means (56, 60, 64) simultaneously carry out operations in parallel when the long instruction word includes a plurality of said instruction words.

Claim 9

The execution system as claimed in claim 5 or 6, characterized in that there are further provided a plurality of operand register means (50) coupled to said judging means, and said judging means (23) includes means for specifying said operand register means depending on the operand specifying part of each instruction word for each of the instruction words included in the long instruction word.

Claim 10

The execution system as claimed in claim 7, characterized in that said instruction words include a first instruction word having a first format (A), a second instruction word having a second format (B) and a third instruction word having a third format (C, D), said first instruction word instructing an operation between contents of first and second registers and a storage of an operation result in a third register, said second instruction word instructing an operation between the content of the first register and an immediate data and a storage of an operation result in the third register, said third instruction word instructing a storage of an immediate data into the third register, said first through third registers being included in said operand register means (50).

Claim 11

The execution system as claimed in claim 8, characterized in that said long instruction words include a first long instruction word having a first word format (FIG.2A), a second long instruction word having a second word format (FIG.2B), a third long instruction word having a third word format (FIG.2C) and a fourth long instruction word having a fourth word format (FIG.2D), said first long instruction word being made up of said type code and three said first instruction words, said second long instruction word being made up of said type code, a said first instruction word and a said second instruction word, said third long instruction word being made up of said type code, a said first instruction word and a said third instruction word, said fourth long instruction word being made up of said type code and a said third instruction word.

Claim 12

The execution system as claimed in claim 9, characterized in that said type code is made up of four bits, said first instruction word is made up of twenty bits, said second instruction word is made up of forty bits, said third instruction word is made up of forty or sixty bits, and the fixed length of said long instruction words is sixty-four bits.