EP0426351A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
CMOS power-on reset circuit
Assignee: Motorola Solutions Inc
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Filing: 1990-10-22
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Granted: —
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Expires: 2010-10-22
Abstract
Abstract The output signal of a CMOS power-on reset circuit changes state upon detecting a predetermined threshold of the power supply voltage (16) during the start-up transient. During the power-up of the power supply voltage, the output signal of the power-on reset circuit ramps up with the power supply voltage until the latter reaches a first predetermined level whereat a control signal (20) begins to track the increasing power supply voltage, less two diodes potentials (12, 14). Upon reaching the turn-on potential of a transistor (32), the control signal activates an inverter (34-40) to substantially reduce the output signal signifying that the power supply voltage level is sufficient for the operation of external circuitry. The output signal (22, 26) then disables the current flowing through the power-on reset circuit to save power consumption.
Inventors
- 👤 Carl C. Hanke
- 👤 Timothy W. Sutton
- 👤 Carlos D. Obregon
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 16:06
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/22; H03K17/223
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
131 words
A circuit responsive to an increasing potential supplied at a first power supply conductor (16) for providing at an output (30, 44) an output signal indicative of the increasing potential until reaching a predetermined threshold of the increasing potential whereat the output signal is substantially reduced, comprising: first means (28, 34-40) coupled to the first power supply conductor for providing the output signal which tracks the increasing potential of the first power supply conductor; second means (12, 14, 18, 32) responsive to the increasing potential of the first power supply conductor upon detecting the predetermined threshold thereof for inhibiting said first means such that the output signal is substantially reduced; and third means (22, 26) responsive to the reduced output signal for suppressing the current flowing through first and second means.
Claim 2
Dependent Claim
131 words
A circuit responsive to an increasing potential supplied at a first power supply conductor (16) for providing at an output (30, 44) an output signal indicative of the increasing potential until reaching a predetermined threshold of the increasing potential whereat the output signal is substantially reduced, comprising: first means (28, 34-40) coupled to the first power supply conductor for providing the output signal which tracks the increasing potential of the first power supply conductor; second means (12, 14, 18, 32) responsive to the increasing potential of the first power supply conductor upon detecting the predetermined threshold thereof for inhibiting said first means such that the output signal is substantially reduced; and third means (22, 26) responsive to the reduced output signal for suppressing the current flowing through first and second means.
Claim 3
Dependent Claim
110 words
The circuit of claim 1 wherein said second means comprises: a first transistor (18) having a gate, a drain and a source, said gate being coupled to the first power supply conductor (16), said source being coupled to a second power supply conductor (24); at least one diode means (12, 14) serially coupled between the first power supply conductor (16) and said drain of said first transistor (18); and a second transistor (32) having a gate, a drain and a source, said gate being coupled to said drain of said first transistor (18), said source being coupled to bad second-power supply conductor (24), said drain being coupled to the output.
Claim 4
Dependent Claim
56 words
The circuit of claim 2 wherein said first means comprises a third transistor (28) having a gate, a drain and a source, said gate being coupled to said second power supply conductor (24), said drain being coupled to said drain of said second transistor (32), said source being coupled to the first power supply conductor (16).
Claim 5
Dependent Claim
45 words
The circuit of claim 3 wherein said third means comprises a fourth transistor (26) having a gate, a drain and a source, said drain being coupled to said source of said third transistor (28), said source being coupled to the first power supply conductor (16).
Claim 6
Dependent Claim
53 words
The circuit of claim 4 wherein said third means further comprises a fifth transistor (22) having a gate, a drain and a source, said gate being coupled to the output, said drain being coupled to said source of said first transistor (18), said source being coupled to said second power supply conductor (24).
Claim 7
Dependent Claim
27 words
The circuit of claim 5 wherein said first means further comprises a driver circuit coupled between said drain of said second transistor (32) and the output (44).
Claim 8
Dependent Claim
31 words
The circuit of claim 6 wherein said driver circuit comprises a first inverter (34, 38) having an input coupled to said drain of said second transistor (32) and having an output.
Claim 9
Dependent Claim
36 words
The circuit of claim 7 wherein said driver circuit further comprises a second inverter (36, 40) having an input coupled to said output of said first inverter and having an output coupled to the output (44).
Claim 10
Independent Claim
129 words
A method of detecting a predetermined threshold of an increasing potential supplied at a power supply conductor during power-on and providing an output signal in response thereto, comprising the steps of: establishing an output signal (30) which tracks the increasing potential supplied at the power supply conductor; developing a control signal (20) having a slew rate substantially equal to the slew rate of the increasing potential of the power supply conductor as the increasing potential of the power supply conductor reaches a first predetermined level; reducing the output signal (44) upon detecting a predetermined level of said control signal corresponding to a second predetermined level of the increasing potential of the power supply conductor; and disabling the current flow (22, 26) upon detecting the reduction of the output signal.
Claim 11
Independent Claim
129 words
A method of detecting a predetermined threshold of an increasing potential supplied at a power supply conductor during power-on and providing an output signal in response thereto, comprising the steps of: establishing an output signal (30) which tracks the increasing potential supplied at the power supply conductor; developing a control signal (20) having a slew rate substantially equal to the slew rate of the increasing potential of the power supply conductor as the increasing potential of the power supply conductor reaches a first predetermined level; reducing the output signal (44) upon detecting a predetermined level of said control signal corresponding to a second predetermined level of the increasing potential of the power supply conductor; and disabling the current flow (22, 26) upon detecting the reduction of the output signal.
References Cited (Backward Citations)
No citation records indexed.
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